• AML LCD debuged


    root@k101:/ # cat /sys/class/lcd/debug                                         
    Usage:
        echo basic <h_active> <v_active> <h_period> <v_period> > debug ; write lcd basic config
        echo type <lcd_type> <lcd_bits> > debug ; write lcd type & bits
        echo clock <lcd_cl
    k> <ss_level> <clk_pol> > debug ; write lcd clk (Hz)
        echo sync <hs_width> <hs_backporch> <hs_pol> <vs_width> <vs_backporch> <vs_pol> > debug ; write lcd sync timing
        echo valid <hvsync_valid> <de_valid> > debug ; enable lcd sync signals
    data format:
        <lcd_type> : 0=mipi, 1=lvds, 2=edp, 3=ttl
        <lcd_bits> : 6=6bit(RGB18bit), 8=8bit(RGB24bit)
        <ss_level> : lcd clock spread spectrum level (0~6), 0 for disable
        <xx_pol>   : 0=negative, 1=positive
        <xx_valid> : 0=disable, 1=enable


        echo ttl <rb_swap> <bit_swap> > debug ; write ttl RGB swap config
        echo lvds <vswing_level> <lvds_repack> <pn_swap> > debug ; write lvds config
        echo mdsi <bit_rate_min> <bit_rate_max> <factor> > debug ; write mipi-dsi config
        echo edp <link_rate> <lane_count> <vswing_level> > debug ; write edp config
    data format:
        <xx_swap>      : 0=normal, 1=swap
        <vswing_level> : lvds support level 0~4 (Default=1); edp support level 0~3 (default=0)
        <lvds_repack>  : 0=JEIDA mode, 1=VESA mode
        <pn_swap>      : 0=normal, 1=swap lvds p/n channels
        <bit_rate_xxx> : unit in MHz
        <link_rate>    : 0=1.62G, 1=2.7G


        echo offset <h_sign> <h_offset> <v_sign> <v_offset> > debug ; write ttl display offset
        echo dither <dither_user> <dither_ctrl> > debug ; write user dither ctrl config
        echo vadj <brightness> <contrast> <saturation> > debug ; write video adjust config
    data format:
        <xx_sign>     : 0=positive, 1=negative
        <dither_user> : 0=disable user control, 1=enable user control
        <dither_ctrl> : dither ctrl in Hex, such as 0x400 or 0x600
        <brightness>  : negative 0x1ff~0x101, positive 0x0~0xff, signed value in Hex, default is 0x0
        <contrast>    : 0x0~0xff, unsigned value in Hex, default is 0x80
        <saturation>  : 0x0~0x1ff, unsigned value in Hex, default is 0x100


        echo write > debug ; update lcd driver
        echo reset > debug ; reset lcd config & driver
        echo read > debug ; read current lcd config
        echo test <num> > debug ; bist pattern test, 0=pattern off, 1~7=different pattern


        echo 0/1 > status ; 0=disable lcd; 1=enable lcd
        cat status ; read current lcd status








































    Usage:
        echo basic <h_active> <v_active> <h_period> <v_period> > debug ; write lcd basic config
        echo type <lcd_type> <lcd_bits> > debug ; write lcd type & bits
        echo clock <lcd_clk> <ss_level> <clk_pol> > debug ; write lcd clk (Hz)
        echo sync <hs_width> <hs_backporch> <hs_pol> <vs_width> <vs_backporch> <vs_pol> > debug ; write lcd sync timing
        echo valid <hvsync_valid> <de_valid> > debug ; enable lcd sync signals
    data format:
        <lcd_type> : 0=mipi, 1=lvds, 2=edp, 3=ttl
        <lcd_bits> : 6=6bit(RGB18bit), 8=8bit(RGB24bit)
        <ss_level> : lcd clock spread spectrum level (0~6), 0 for disable
        <xx_pol>   : 0=negative, 1=po






    sitive
        <xx_valid> : 0=disable, 1=enable


        echo ttl <rb_swap> <bit_swap> > debug ; write ttl RGB swap config    #echo ttl <0> <0> > debug 
        echo lvds <vswing_level> <lvds_repack> <pn_swap> > debug ; write lvds config
        echo mdsi <bit_rate_min> <bit_rate_max> <factor> > debug ; write mipi-dsi config
        echo edp <link_rate> <lane_count> <vswing_level> > debug ; write edp config
    data format:
        <xx_swap>      : 0=normal, 1=swap
        <vswing_level> : lvds support level 0~4 (Default=1); edp support level 0~3 (default=0)
        <lvds_repack>  : 0=JEIDA mode, 1=VESA mode
        <pn_swap>      : 0=normal, 1=swap lvds p/n channels
        <bit_rate_xxx> : unit in MHz
        <link_rate>    : 0=1.62G, 1=2.7G


        echo offset <h_sign> <h_offset> <v_sign> <v_offset> > debug ; write ttl display offset
        echo dither <dither_user> <dither_ctrl> > debug ; write user dither ctrl config
        echo vadj <brightness> <contrast> <saturation> > debug ; write video adjust config
    data format:
        <xx_sign>     : 0=positive, 1=negative
        <dither_user> : 0=disable user control, 1=enable user control
        <dither_ctrl> : dither ctrl in Hex, such as 0x400 or 0x600
        <brightness>  : negative 0x1ff~0x101, positive 0x0~0xff, signed value in Hex, default is 0x0
        <contrast>    : 0x0~0xff, unsigned value in Hex, default is 0x80
        <saturation>  : 0x0~0x1ff, unsigned value in Hex, default is 0x100


        echo write > debug ; update lcd driver
        echo reset > debug ; reset lcd config & driver
        echo read > debug ; read current lcd config
        echo test <num> > debug ; bist pattern test, 0=pattern off, 1~7=different pattern


        echo 0/1 > status ; 0=disable lcd; 1=enable lcd
        cat status ; read current lcd status


    root@k101:/sys/class/lcd # echo read > debug
    [ 7258.061871@0] lcd driver version: 20140805c8
    [ 7258.061871@0] 
    [ 7258.062388@0] LCD mode: CLAP070NJ02, TTL 6bit, 1024x600@50.0Hz
    [ 7258.062388@0] lcd_clk           42.699MHz
    [ 7258.062388@0] ss_level          0
    [ 7258.062388@0] clk_pol           0
    [ 7258.062388@0] 
    [ 7258.082124@0] h_period          1344
    [ 7258.082124@0] v_period          635
    [ 7258.082124@0] hs_width          10
    [ 7258.082124@0] hs_backporch      160
    [ 7258.082124@0] hs_pol            0
    [ 7258.082124@0] vs_width          5
    [ 7258.082124@0] vs_backporch      23
    [ 7258.082124@0] vs_pol            0
    [ 7258.082124@0] vs_h_phase        0
    [ 7258.082124@0] hvsync_valid      1
    [ 7258.082124@0] de_valid          1
    [ 7258.082124@0] h_offset          0
    [ 7258.082124@0] v_offset          0
    [ 7258.082124@0] 
    [ 7258.129269@0] rb_swap           0
    [ 7258.129269@0] bit_swap          0
    [ 7258.129269@0] 
    [ 7258.134175@0] pll_ctrl          0x01000438
    [ 7258.134175@0] div_ctrl          0x00018833
    [ 7258.134175@0] clk_ctrl          0x8eee1002
    [ 7258.134175@0] video_on_pixel    300
    [ 7258.134175@0] video_on_line     35
    [ 7258.134175@0] 


    cd /sys/devices/platform/backlight/backlight/aml-bl/brightness




     echo sync <hs_width> <hs_backporch> <hs_pol> <vs_width> <vs_backporch> <vs_pol> > debug


    echo sync 10 160 0 5 23 0 > debug 
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  • 原文地址:https://www.cnblogs.com/slgkaifa/p/7192876.html
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