Error: timed out while waiting for target halted

/************************************************************************************
 *              Error: timed out while waiting for target halted
 * 说明：
 *     SW4STM32 STLINK 无法烧录问题。
 *
 *                                            2017-12-26 深圳 宝安西乡 曾剑锋
 ***********************************************************************************/


一、参考文档：
    STLink2 problems reseting
        https://forum.sparkfun.com/viewtopic.php?t=45260

二、报错信息：
    Open On-Chip Debugger 0.10.0-dev-00005-g4030e1c-dirty (2017-10-24-08:00)
    Licensed under GNU GPL v2
    For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
    srst_only separate srst_nogate srst_open_drain connect_assert_srst
    Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
    adapter_nsrst_delay: 100
    adapter speed: 950 kHz
    Info : clock speed 950 kHz
    Info : STLINK v2 JTAG v27 API v2 SWIM v6 VID 0x0483 PID 0x3748
    Info : vid/pid are not identical: 0x0483/0x374B 0x0483/0x3748
    Info : using stlink api v2
    Info : Target voltage: 3.253404
    Info : Stlink adapter speed set to 950 kHz
    Info : STM32F103CBTx.cpu: hardware has 6 breakpoints, 4 watchpoints
    Info : Stlink adapter speed set to 950 kHz
    adapter speed: 950 kHz
    Error: timed out while waiting for target halted
    TARGET: STM32F103CBTx.cpu - Not halted
    in procedure 'program' 
    in procedure 'reset' called at file "embedded:startup.tcl", line 478
    in procedure 'ocd_bouncer'
    
    ** Unable to reset target **
    shutdown command invoked

三、Run.cfg 解决办法：
    # use hardware reset, connect under reset
    # connect_assert_srst needed if low power mode application running (WFI...)
    # reset_config srst_only srst_nogate connect_assert_srst
    reset_config none

四、reset_config none输出信息：
    Open On-Chip Debugger 0.10.0-dev-00005-g4030e1c-dirty (2017-10-24-08:00)
    Licensed under GNU GPL v2
    For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
    none separate
    Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
    adapter_nsrst_delay: 100
    adapter speed: 950 kHz
    Info : clock speed 950 kHz
    Info : STLINK v2 JTAG v27 API v2 SWIM v6 VID 0x0483 PID 0x3748
    Info : vid/pid are not identical: 0x0483/0x374B 0x0483/0x3748
    Info : using stlink api v2
    Info : Target voltage: 3.254990
    Info : Stlink adapter speed set to 950 kHz
    Info : STM32F103CBTx.cpu: hardware has 6 breakpoints, 4 watchpoints
    Info : Stlink adapter speed set to 950 kHz
    adapter speed: 950 kHz
    STM32F103CBTx.cpu: target state: halted
    target halted due to debug-request, current mode: Thread 
    xPSR: 0x01000000 pc: 0x1ffff020 msp: 0x200001fc
    Info : Stlink adapter speed set to 4000 kHz
    adapter speed: 4000 kHz
    ** Programming Started **
    auto erase enabled
    Info : device id = 0x20036410
    Info : flash size = 64kbytes
    STM32F103CBTx.cpu: target state: halted
    target halted due to breakpoint, current mode: Thread 
    xPSR: 0x61000000 pc: 0x2000003a msp: 0x200001fc
    wrote 4096 bytes from file Debug/STM32F103CBT6.elf in 0.261079s (15.321 KiB/s)
    ** Programming Finished **
    ** Verify Started **
    STM32F103CBTx.cpu: target state: halted
    target halted due to breakpoint, current mode: Thread 
    xPSR: 0x61000000 pc: 0x2000002e msp: 0x200001fc
    STM32F103CBTx.cpu: target state: halted
    target halted due to breakpoint, current mode: Thread 
    xPSR: 0x61000000 pc: 0x2000002e msp: 0x200001fc
    verified 3304 bytes in 0.067082s (48.099 KiB/s)
    ** Verified OK **
    ** Resetting Target **
    Info : Stlink adapter speed set to 950 kHz
    adapter speed: 950 kHz
    shutdown command invoked