BSP之bootloader开发（三）—— serial debug functions

13. Implement the following serial debug functions in your boot loader code:

• OEMDebugInit  
• OEMWriteDebugString 
• OEMWriteDebugByte 
• OEMReadDebugByte  

These functions are required BLCOMMON callback functions that you must implement in your boot loader code.

 下表展示了需要我们去实现的各串口调试函数：

Function	Description
OEMDebugInit	Initializes any debug UART you want the boot loader to be able to use. OEMDebugInit is called by BLCOMMON, which in turn calls OEMInitDebugSerial. The core functionality is placed in OEMInitDebugSerial because the kernel calls this function, and thus, it can be shared between the boot loader and the OS.
OEMWriteDebugString	Writes a text string to the debug UART. This function takes Unicode strings, not regular C strings. When calling this function, use the TEXT macro to convert C strings to Unicode strings. 此函数接收Unicode码，可使用TEXT宏转换； The following code example shows how to use OEMWriteDebugString with the TEXT macro. OEMWriteDebugString( TEXT("This is a debug message.") );
OEMWriteDebugByte	A primitive used by the OEMWriteDebugString function.
OEMReadDebugByte	Reads a byte from the debug UART.

 

编辑Main.c文件，增加必要的代码去实现前面讲到的stubs，接下来的是一个串口调试函数，它的配置和初始化（ARM的S3C2410）  

具体实现如下：

//------------------------------------------------------------------------------
 //
 //  Function: OEMInitDebugSerial
 //
 //  Initializes the debug serial port
 //
 VOID OEMInitDebugSerial() 
{
    S3C2410X_IOPORT_REG *pIOPortReg;
    UINT32 logMask;


    // At this moment we must suppress logging.
    //
     logMask = g_oalLogMask;
    g_oalLogMask = 0;

    // Configure port H for UART1.
    //pIOPortReg指向物理地址S3C2410X_BASE_REG_PA_IOPORT映射后的无cache的虚拟地址
     pIOPortReg = (S3C2410X_IOPORT_REG*)OALPAtoVA(S3C2410X_BASE_REG_PA_IOPORT, FALSE);

    // GPH4 and GHP5 are UART1 Tx and Rx, respectively.
    //
     CLRREG32(&pIOPortReg->GPHCON, (3 << 8)|(3 << 10));
    SETREG32(&pIOPortReg->GPHCON, (2 << 8)|(2 << 10));

    // Disable pull-up on TXD1 and RXD1.
    //
     SETREG32(&pIOPortReg->GPHUP, (1 << 4)|(1 << 5));

    // UART1 (TXD1 & RXD1) used for debug serial.
    //g_pUARTReg指向物理地址S3C2410X_BASE_REG_PA_UART1映射后的无cache的虚拟地址
     g_pUARTReg = (S3C2410X_UART_REG *)OALPAtoVA(S3C2410X_BASE_REG_PA_UART1, FALSE);

    // Configure the UART.
    //
     OUTREG32(&g_pUARTReg->UFCON,  BSP_UART1_UFCON);
    OUTREG32(&g_pUARTReg->UMCON,  BSP_UART1_UMCON);
    OUTREG32(&g_pUARTReg->ULCON,  BSP_UART1_ULCON);
    OUTREG32(&g_pUARTReg->UCON,   BSP_UART1_UCON);
    OUTREG32(&g_pUARTReg->UBRDIV, BSP_UART1_UBRDIV);

    // Restore the logging mask.
    //
     g_oalLogMask = logMask;
}

//------------------------------------------------------------------------------
 //
 //  Function: OEMWriteDebugByte
 //
 //  Transmits a character out the debug serial port.
 //
 VOID OEMWriteDebugByte(UINT8 ch) 
{
    // Wait for transmit buffer to be empty
     while ((INREG32(&g_pUARTReg->UTRSTAT) & 0x02) == 0);

    // Send character
     OUTREG32(&g_pUARTReg->UTXH, ch);
}

函数OALPAtoVA的原型是VOID * OALPAtoVA(UINT32 pa,BOOL cached);

它是OAL接口函数的一个，用于返回由物理地址pa映射的有cache或无cache的虚拟地址；

   

附：

 

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Header:  s3c2410x_ioport.h
//
//  Defines the Input/Output Ports (IOPORT) control registers and associated
//  types and constants.
//
#ifndef __S3C2410X_IOPORT_H
#define __S3C2410X_IOPORT_H

#if __cplusplus
extern "C" {
#endif

//------------------------------------------------------------------------------

typedef struct {
    UINT32 GPACON;                  // Port A - offset 0
    UINT32 GPADAT;                  // Data
    UINT32 PAD1[2];

    UINT32 GPBCON;                  // Port B - offset 0x10
    UINT32 GPBDAT;                  // Data
    UINT32 GPBUP;                   // Pull-up disable
    UINT32 PAD2;

    UINT32 GPCCON;                  // Port C - offset 0x20
    UINT32 GPCDAT;                  // Data
    UINT32 GPCUP;                   // Pull-up disable
    UINT32 PAD3;
    
    UINT32 GPDCON;                  // Port D - offset 0x30
    UINT32 GPDDAT;                  // Data
    UINT32 GPDUP;                   // Pull-up disable
    UINT32 PAD4;
    
    UINT32 GPECON;                  // Port E - offset 0x40
    UINT32 GPEDAT;                  // Data
    UINT32 GPEUP;                   // Pull-up disable
    UINT32 PAD5;                 
    
    UINT32 GPFCON;                  // Port F - offset 0x50
    UINT32 GPFDAT;
    UINT32 GPFUP; 
    UINT32 PAD6;
    
    UINT32 GPGCON;                  // Port G - offset 0x60
    UINT32 GPGDAT;
    UINT32 GPGUP; 
    UINT32 PAD7;
    
    UINT32 GPHCON;                  // Port H - offset 0x70
    UINT32 GPHDAT;
    UINT32 GPHUP; 
    UINT32 PAD8;

    UINT32 MISCCR;                  // misc control reg - offset 0x80
    UINT32 DCLKCON;                 // DCLK0/1 control reg
    
    UINT32 EXTINT0;                 // external interrupt control reg 0
    UINT32 EXTINT1;                 // external interrupt control reg 1
    UINT32 EXTINT2;                 // external interrupt control reg 2
    
    UINT32 EINTFLT0;                // reserved
    UINT32 EINTFLT1;                // reserved
    UINT32 EINTFLT2;                // external interrupt filter reg 2
    UINT32 EINTFLT3;                // external interrupt filter reg 3

    UINT32 EINTMASK;                // external interrupt mask reg
    UINT32 EINTPEND;                // external interrupt pending reg

    UINT32 GSTATUS0;                // external pin status
    UINT32 GSTATUS1;                // chip ID
    UINT32 GSTATUS2;                // reset status
    UINT32 GSTATUS3;                // inform register
    UINT32 GSTATUS4;                // inform register
    
} S3C2410X_IOPORT_REG, *PS3C2410X_IOPORT_REG;  

//------------------------------------------------------------------------------

#if __cplusplus
}
#endif

#endif // __S3C2410X_IOPORT_H

   

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Header:  s3c2410x_uart.h
//
//  Defines the UART controller register layout associated types and constants.
//
#ifndef __S3C2410X_UART_H
#define __S3C2410X_UART_H

#if __cplusplus
extern "C" {
#endif

//------------------------------------------------------------------------------
//
//  Type:  S3C2410X_UART_REG    
//
//  UART control registers. This register bank is located by the constant
//  S3C2410X_BASE_REG_XX_UARTn in the configuration file
//  s3c2410x_base_reg_cfg.h.
//
typedef struct {
    UINT32 ULCON;                   // line control reg
    UINT32 UCON;                    // control reg
    UINT32 UFCON;                   // FIFO control reg
    UINT32 UMCON;                   // modem control reg
    UINT32 UTRSTAT;                 // tx/rx status reg
    UINT32 UERSTAT;                 // rx error status reg
    UINT32 UFSTAT;                  // FIFO status reg
    UINT32 UMSTAT;                  // modem status reg
    UINT32 UTXH;                    // tx buffer reg
    UINT32 URXH;                    // rx buffer reg
    UINT32 UBRDIV;                  // baud rate divisor

} S3C2410X_UART_REG, *PS3C2410X_UART_REG;

//------------------------------------------------------------------------------

#if __cplusplus
    }
#endif

#endif

 

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  File:  bsp_cfg.h
//
//  This file contains system constant specific for SMDK2410X board.
//
#ifndef __BSP_CFG_H
#define __BSP_CFG_H

//------------------------------------------------------------------------------
//
//  Define:  BSP_DEVICE_PREFIX
//
//  Prefix used to generate device name for bootload/KITL
//
#define BSP_DEVICE_PREFIX       "SMDK2410"        // Device name prefix

//------------------------------------------------------------------------------
// Board clock
//------------------------------------------------------------------------------

#define S3C2410X_FCLK           203000000           // 203MHz
#define S3C2410X_PCLK           (S3C2410X_FCLK/4)   // divisor 4

//------------------------------------------------------------------------------
// Debug UART1
//------------------------------------------------------------------------------

#define BSP_UART1_ULCON         0x03                // 8 bits, 1 stop, no parity
#define BSP_UART1_UCON          0x0005              // pool mode, PCLK for UART
#define BSP_UART1_UFCON         0x00                // disable FIFO
#define BSP_UART1_UMCON         0x00                // disable auto flow control
#define BSP_UART1_UBRDIV        (S3C2410X_PCLK/(38400*16) - 1)

//------------------------------------------------------------------------------
// Static SYSINTR Mapping for driver.
#define SYSINTR_OHCI            (SYSINTR_FIRMWARE+1)

#endif