http://www.stmcu.org/module/forum/forum.php?mod=viewthread&tid=605203&extra=page%3D&page=1
ADC1与ADC2工作在规则同步扫描模式，TIM4CC4触发，DMA读取ADC结果；设计目标是每周波（20毫秒）采样32点或64点或128点等数据，TIM4的初始化程序自动计算采样间隔，例如如果每周期采样32个点的数据，那么TIM4的触发间隔是20*1000/32=625微秒，也就是每625微秒触发一次ADC，由于使能了ADC的扫描模式，所以一次触发转换6个ADC通道产生6个32位的数据（在F103上采用的是间断模式，而F407的间断模式没有使用起来，只好用扫描模式），每个通道转换结束后由DMA读取转换结果保存到内存缓冲区等待计算，TIM4一次触发ADC后DMA读取6个32位数据，DMA计数到32*6=192个数据后产生中断，DMA的实际中断间隔是20毫秒，在DMA中断内重新设置DMA参数同时设置转换结束标志供计算使用。
void TIMx_Configuration(void)
{
Uint32 Temp;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
TIM_InternalClockConfig(TIM4);
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
if(((RCC->CFGR >> 10) & 0x04)==0)
{
Temp=1;
}
else
{
Temp=2;
}
TIM_TimeBaseStructure.TIM_Period = TIM4_ClkFre/AdcPrNum/50;
TIM_TimeBaseStructure.TIM_Prescaler = APB1CLK*Temp/TIM4_ClkFre-1;
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;
TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse=TIM_TimeBaseStructure.TIM_Period/10;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC4Init(TIM4, &TIM_OCInitStructure);
TIM_OC4PreloadConfig(TIM4, TIM_OCPreload_Enable);
TIM_Cmd(TIM4, ENABLE);
}
void ADC_Configuration(void)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC,ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1,ENABLE);
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T4_CC4;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = AdcChNum;
ADC_Init(ADC1,&ADC_InitStructure);
ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div6;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_2;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_10Cycles;
ADC_CommonInit(&ADC_CommonInitStructure);
ADC_DiscModeChannelCountConfig(ADC1,AdcChNum);
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
ADC_DMACmd(ADC1, ENABLE);
ADC_Cmd(ADC1, ENABLE);
ADC1->SMPR2 |= ADC_SMPR_13_5 << 0;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 3;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 6;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 9;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 12;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 15;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 18;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 21;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 24;
ADC1->SMPR2 |= ADC_SMPR_13_5 << 27;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 0;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 3;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 6;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 9;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 12;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 15;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 18;
ADC1->SMPR1 |= ADC_SMPR_13_5 << 21;
ADC1->SQR3 |= UL1AinCH << 0;
ADC1->SQR3 |= UczAinCH << 5;
ADC1->SQR3 |= UaAinCH << 10;
ADC1->SQR3 |= UbAinCH << 15;
ADC1->SQR3 |= UcAinCH << 20;
ADC1->SQR3 |= U0AinCH << 25;
ADC1->SQR2 |= 7 << 0;
ADC1->SQR2 |= 8 << 5;
ADC1->SQR2 |= 9 << 10;
ADC1->SQR2 |= 10 << 15;
ADC1->SQR2 |= 11 << 20;
ADC1->SQR2 |= 12 << 25;
ADC1->SQR1 |= 13 << 0;
ADC1->SQR1 |= 14 << 5;
ADC1->SQR1 |= 15 << 10;
ADC1->SQR1 |= 16 << 15;
ADC1->SQR1 |= (AdcChNum-1) << 20;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2,ENABLE);
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T4_CC4;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = AdcChNum;
ADC_Init(ADC2,&ADC_InitStructure);
ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div6;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_2;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_10Cycles;
ADC_CommonInit(&ADC_CommonInitStructure);
ADC_DiscModeChannelCountConfig(ADC2,AdcChNum);
ADC_DMARequestAfterLastTransferCmd(ADC2, ENABLE);
ADC_DMACmd(ADC2, ENABLE);
ADC_Cmd(ADC2, ENABLE);
ADC2->SMPR2 |= ADC_SMPR_13_5 << 0;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 3;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 6;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 9;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 12;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 15;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 18;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 21;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 24;
ADC2->SMPR2 |= ADC_SMPR_13_5 << 27;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 0;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 3;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 6;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 9;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 12;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 15;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 18;
ADC2->SMPR1 |= ADC_SMPR_13_5 << 21;
ADC2->SQR3 |= UL2AinCH << 0;
ADC2->SQR3 |= UdcAinCH << 5;
ADC2->SQR3 |= IaAinCH << 10;
ADC2->SQR3 |= IbAinCH << 15;
ADC2->SQR3 |= IcAinCH << 20;
ADC2->SQR3 |= I0AinCH << 25;
ADC2->SQR2 |= 7 << 0;
ADC2->SQR2 |= 8 << 5;
ADC2->SQR2 |= 9 << 10;
ADC2->SQR2 |= 10 << 15;
ADC2->SQR2 |= 11 << 20;
ADC2->SQR2 |= 12 << 25;
ADC2->SQR1 |= 13 << 0;
ADC2->SQR1 |= 14 << 5;
ADC2->SQR1 |= 15 << 10;
ADC2->SQR1 |= 16 << 15;
ADC2->SQR1 |= (AdcChNum-1) << 20;
}
void DMA2_Stream0_IRQHandler(void)
{
#if(DMA2_STREAM0)
if(DMA2->LISR & (1 << 5))
{
DMA2->LIFCR |= (1<<5);
DMA_Cmd(DMA2_Stream0, DISABLE);
DMA2_Stream0->NDTR = AdcPrNum*AdcChNum;
DMA2_Stream0->M0AR = (u32)&ADC1_Buf;
DMA_Cmd(DMA2_Stream0, ENABLE);
}
#endif
}
AdcPrNum 为每周期采样点数；AdcChNum 为通道个数，例如需要采样UA、UB、UC、IA、IB、IC6路模拟信号，则AdcChNum =6/2=3；
void DMA_Configuration(void)
{
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2,ENABLE);
DMA_DeInit(DMA2_Stream0);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQChannel;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_InitStructure.DMA_Channel=DMA2_STREAM0_CH0_ADC1;
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&ADC->CDR;
DMA_InitStructure.DMA_Memory0BaseAddr = (u32)&ADC1_Buf;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = AdcPrNum*AdcChNum;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode=DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold=DMA_FIFOThreshold_1QuarterFull;
DMA_InitStructure.DMA_MemoryBurst=DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst=DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream0, &DMA_InitStructure);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC , ENABLE);
DMA_Cmd(DMA2_Stream0, ENABLE);
}