• TQ2440之系统时钟


    S3C2440有三个时钟:FCLK for CPU, HCLK for the AHB bus peripherals, and PCLK for the APB bus peripherals

    S3C2440系统时钟配置:

    首先配置PLL控制寄存器

    设置MPLLCON寄存器

    unsigned int FCLK;
    unsigned int HCLK;
    unsigned int PCLK;
    unsigned int UCLK;

    #define FIN  12000000

    1 void ChangeMPllValue(int mdiv,int pdiv,int sdiv)//设置FCLK的值
    2 {
    3     MPLLCON = (mdiv<<12) | (pdiv<<4) | sdiv;
    4 }

    设置UPLLCON寄存器

    1 void ChangeUPllValue(int mdiv,int pdiv,int sdiv)//设置UCLK的值,给USB供节拍
    2 {
    3     UPLLCON = (mdiv<<12) | (pdiv<<4) | sdiv;
    4 }

    设置时钟分频器控制寄存器CLKDIVN

     1 void ChangeClockDivider(int hdivn,int pdivn)//设置FCLK,HCLK,PCLK的时钟比例,以及摄像头时钟比例
     2 {
     3      // hdivn,pdivn FCLK:HCLK:PCLK
     4      //     0,0         1:1:1 
     5      //     0,1         1:1:2 
     6      //     1,0         1:2:2
     7      //     1,1         1:2:4
     8      //     2,0         1:4:4
     9      //     2,1         1:4:8
    10      //     3,0         1:3:3
    11      //     3,1         1:3:6
    12     CLKDIVN = (hdivn<<1) | pdivn;    
    13 
    14     if (hdivn == 2)
    15     CAMDIVN = (CAMDIVN & ~(1<<9));
    16 if (hdivn == 3) 17 CAMDIVN = (CAMDIVN & ~(1<<8));
    18 }

     计算具体的FCLK,HCLK,PCLK,UCLK的大小

     1 void CalcBusClk(void) //计算具体的FCLK,HCLK,PCLK,UCLK的大小
     2 {
     3     unsigned int val,UPLL;
     4     unsigned char m, p, s;
     5     val = MPLLCON;
     6     m = (val >> 12) & 0xff;
     7     p = (val >> 4) & 0x3f;
     8     s = val & 3;
     9     
    10     FCLK = ((m+8)*FIN*2)/((p+2)*(1<<s));
    11     
    12     val = CLKDIVN;
    13     m = (val >> 1) & 3;
    14     p = val & 1; 
    15     val = CAMDIVN;
    16     s = val >> 8;
    17     
    18     switch (m) 
    19     {
    20         case 0:
    21             HCLK = FCLK;
    22             break;
    23         case 1:
    24             HCLK = FCLK >> 1;
    25             break;
    26         case 2:
    27             if(s & 2)
    28                 HCLK = FCLK >> 3;
    29             else
    30                 HCLK = FCLK >> 2;
    31             break;
    32         case 3:
    33             if(s & 1)
    34                 HCLK = FCLK / 6;
    35             else
    36                 HCLK = FCLK / 3;
    37             break;
    38     }
    39     if(p)
    40         PCLK = HCLK >> 1;
    41     else
    42         PCLK = HCLK;
    43     
    44     val = UPLLCON;
    46     m = (val >> 12) & 0xff;
    47     p = (val >> 4) & 0x3f;
    48     s = val & 3;
    49     UPLL = ((m+8)*FIN)/((p+2)*(1<<s));
    50     UCLK = (CLKDIVN&8)?(UPLL>>1):UPLL;
    51 }
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  • 原文地址:https://www.cnblogs.com/zpehome/p/2824502.html
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