week9:
查找论文的情况
1.*(reference) title:Improving Performance and Capacity of Flash Storage Devices by Exploiting Heterogeneity of MLC Flash Memory author:Sungjin Lee ; Jihong Kim from:IEEE TRANSACTIONS ON COMPUTERS content: (1)A MLC NAND flash memory, each memory cell can be programmed as a single-level cell or a multi-level cell at runtime (2)present a flexible flash file system, called FlexFS, (3)To provide high performance and high capacity simultaneously, FlexFS employs a dynamic free-space management (DFM) technique. (4)FlexFS also adopts a novel dynamic lifetime management (DLM) technique, which manages the storage lifetime by controlling the use of SLC-mode programming. (5)In order to achieve the SLC performance, FlexFS writes as many data as possible toflash memory using fast SLC-mode programming. *(6)Free-space reclamation--idle time (7)The dynamic free-space management (DFM) technique resolves the problems caused by improper management of free space by maintaining minimal but sufficient free space (8)The dynamic lifetime management (DLM) technique adaptively controls the wearing rate offlash memory (which is accelerated by free-space reclamation) so that a reasonable storage lifetime can be provided (9)FlexFS is based on a JFFS2file system (10)same pages? (11)2 write buffer & log (12)free-space reclamation is performed only when there are no user I/O activities and on-demand free-space reclamation is not required (see Section 3.2).free-space reclamation is performed only when there are no user I/O activities and on-demand free-space reclamation is not required. (13)If an observed idle period is longer than a certain threshold value, FlexFS triggers free-space reclamation, expecting that there will be a long idle period.[50 ms] (14) delayed freespace reclamation does not trigger free-space reclamation unless available free space is smaller than TH. (15)a delayed free-space reclamation policy that delays free-space reclamation as long as possible so that many data are invalidated in the SLC region. [SLC invalid page] (16)DLM[w]
2. title:A Workload-Aware-Design of 3D-NAND Flash Memory for Enterprise SSDs author:Chao Sun(Japan) from:15th Int'l Symposium on Quality Electronic Design(2014) content: (1)SCM/NAND flash hybrid
3. title:Differentiated Storage Services autor:Michael Mesnier, Feng Chen, Tian Luo from:SOSP '11 content: (1)I/O classification architecture (2)As examples, the “middle” of a disk can be used to reduce seek latency, and the “outer tracks” can be used to improve transfer speeds. (3)I/O is classified as metadata, journal, directory, or file, and file I/O is further classified by the file size (e.g., ≤4KB≤16KB, ...,>1GB). (4)we modify the OS block layer so that every I/O request carries a classifier. We copy this classifier into the I/O command.In this way, a storage system can provide block-level differentiated services (performance,reliability, or security) (5)This paper focuses on priorities (6)Our storage systems implement a priority-based performance policy, so we map each class to a priority level (7)For the FS, the priorities reflect our goal to reduce small random access in the storage system, by giving small files and metadata higher priority than large files. For the DB, we simply demonstrate the flexibility of our approach by assigning caching policies to common data structures (indexes, tables, and logs).
4.* title: Hystor: Making the Best Use of Solid State Drives in High Performance Storage Systems autor: Feng Chen David Koufaty from: ICS’11(2011) content: *(1)针对LRU的缺点改进，缺点（cache pollution problem ） (2)a special data structure, called block table. for large-scale history recode. (3)automatically learns *(4)identifies semantically-critical blocks (e.g. file system metadata) （5）HDD和SDD混合 （6）request size, frequency, seek distance, reuse distance, （7）use the blktrace tool （8）(frequency/request_size）is found to be the most effective one
thought (1)多个优先级维度，比如更新快于写入？---顺序 (2)对比，要比LRU好，也要比size threshold 好，可以从正确分配比例上、page collection上 (3)SLC1：for random ； SLC2：for cache (4)先在SLC中读写，然后不用了再调度到TLC中 (5)request size, frequency, // logical move distance, reuse distance, size change // on time requests , on time workload (6)SLC/TLC Range (7)[write paper]---Details Introduction (8)SLC--->TLC idle time[find a suitable time]& 1.14 & 1.15[paper1:3.21,fig7]
week10:
Liu review:
I think this is the strategy of your implementation. For the paper, we need to add some therotical things. To prepare this paper, you need to study the "design space exploration", and try to apply this therory into the TLC/SLC flash memory management.
Please look at the following materials. Then you can tell me what is design space exploration.
http://people.csail.mit.edu/eskang/papers/monterey10.pdf http://dse.esi.nl/ google:design space exploration qingfeng zhuge
第一： title：基于模型树的多核设计空间探索技术 author：郭 崎，陈天石（中国科学院） from:计算机辅助设计与图形学学报 content: (1)．统计采样,统计模拟 (2)，其主要目标都是对用于评估模拟的复杂基准测试程序进行精简，提取（统计采样）或者构造（统计模拟）出新的程序来代替原程序执行 (3), 本文介绍了基于模型树的预测模型方法用于复杂多核设计空间探索的问题
第二：* title：Design Space Exploration of Embedded System from：PPT content: （1）“Review of General Aspects”介绍好像和trace file挺相关的，没有具体算法 （2）“Basic Models and Methods”
第三：(没看懂) title：Design Space Minimization with Timing and Code Size Optimization for Embedded DSP from：CODES+ISSS'03（2003） content： （1）We show an effective way to reduce the design space to be explored through the st udy of the fundamental properties and relations among multiple design parameters, such as retiming value, unfolding factor （2）problems:in high-level synthesis is how to explore a wide range of design options to achI eve hIgh-quality designs within a short time （3）retiming?
第四： title：An Approach for E ective Design Space Exploration author：Eunsuk Kang, Ethan Jackson（Massachusetts Institute of Technology, Cambridge） content： （1）定义：Design space exploration (DSE) refers to the activity of exploring design alternatives prior to implementation. 设计空间探索（DSE）是指在执行之前探索设计选择方案的活性。 （2）用途engineering tasks：rapid prototyping, optimization, and system integration （3）主要挑战：庞大的design space，枚举的话太难 （4）key idea：The key idea is that many of the design candidates may be considered equivalent as far as the user is concerned, and so only a small subset of the space needs to be explored.很大一部分是类似的.
（5）Introduction (5.1)应用范围的具体解释（rapid prototyping, optimization, and system integration. ） (5.2)结构，必须包含的部分： a）Representation:formal b) Analysis:(自动分析) c) Exploration method:筛选坏结构后数量还是很多，归纳一样的，选有特色的。 （5.3）solution，interstate？ （6）Motivating Example (6.1)一个图论的着色问题 (6.2)An optimization problem cannot be formulated easily at this high-level, and so rapid prototyping combined with simulation is the approach that is often taken to evaluate design alternatives (6.3)enumerate枚举法：each solution in the design space will have a large (possibly in nite) number of counterparts that di er only by labeling of devices. （7）Background on FORMULA （7.1）本例中选用CLP语言来描述约束 （7.2）表达式（1）（2） (8)Design Space Exploration Method ?* (8.1)这一节应该是将如何去除 similar solution (8.2)Na}ve Exploration Algorithm:有相同的部分就丢弃 （8.3）第十页，注解三的算法用来计算等价类 （8.4）Improved Algorithm
week 12:
1. title：Phoenix: Reviving MLC Blocks as SLC to Extend NAND Flash Devices Lifetime author：Xavier Jimenez, David Novo and Paolo Ienne from:date 13 content: （1）present Phoenix，a novel scheme to extend current FTL that mitigate the degradation in lifetime of MLC flash. （2）损坏的MLC复活为SLC，增加ECC的编码长度 （3）统计计算了确定了边界值
2.这是一个关于电压和容错的 title：Estimating Information-Theoretical NAND Flash Memory Storage Capacity and its Implication to Memory System Design Space Exploration author：Guiqiang Dong，Ningde Xie from：IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 20, NO. 9, SEPTEMBER 2012 content： （1）introduction中512/512+28*2=1.9 这个公式有问题 （2）background: （2.1）等式1，擦除电压成正太分布。 （2.2）[B]Effects of P/E Cycling ? (2.3) [C]Cell-to-Cell Interference (3) 10K P/E cycling and 10-year retention:当trace数值比较低的时候，转化成时间，看起来比较长。
3. Jingtong Hu 主页
4. title：Cross-Architectural Design Space Exploration Tool for Reconfigurable Processors author:Muhammad Shafique from:DATE09 content: 有关不同指令集结构的。
5. title:DESSERT: DESign Space ExploRation Tool based on Power and Energy at System-Level author:Santhosh Kumar Rethinagiri*, Oscar Palomar* from:SOCC 2014 content: (1)DSE tool at system-level to estimate power and energy consumption of an application on a heteroge-neous quad-core platform consisting of ARM Cortex-Al5 and Cortex-A 7 processors (2)Table2展示了各种内核的能耗公式
6. PPT:Gordon:Using Flash Memory to Build Fast, Powerefficient Clusters for Data-intensive Applications author:Adrian M. Caulfield (University of California, San Diego) (1)将Flash Memory用于数据中心，优化其并行性 *（2）有一些workload 数据 *（3）Write Combining：Merge multiple writes to the same address when possible
week13
1. title：Architecture Exploration of NAND Flash-based Multimedia Card author：Sungchan Kim from：DATE08 content： （1）the reduction of cost is a primary design concern (2)efficient evolutionary algorithm (3)Previous works:[1][2][3][4]
(4)Memory cards typically consist of only a few bus masters and a small number of memory components *(5)We use TLM simulation only for memory trace generation and use trace-driven simulation for fast but accurate performance estimation in the inner-most exploration loop. 这是一个两级的策略，对不同trace用不同的策略 （6） The first step is to collect memory traces for a given test scenario The different size of double buffers requires a slight modification of the firmware running on the card. (7) Once these parameters are chosen, a TLM simulation is run to get the memory traces. (8) After obtaining memory traces, the bus matrix and memory architecture exploration is performed
2. title：Memory System Design Space Exploration for Low-Power,Real-Time Speech Recognition author：Rajeev Krishna, Scott Mahlke, and Todd Austin（University of Michigan） from：ISSS-CODES’04 content： （1）This work presents a design space exploration of potential memory system architectures （2）We find that moderate sized hybrid Chip Multiprocessor / MultiThreading (CMP/MT) architectures (4) simple pipelines, 2–4 hardware contexts each), combined with multilevel caching targeting program metadata (dynamic programming lists and the like) provide good tradeoffs in maximizing performance while reducing overall energy consumption. (5)应用程序为语音识别
3. title：design space exploration of memory model for heterogeneous computing author：Jieun Lim，Hyesoon Kim from：MSPC’12 content： **（1） MacSim simulator ，a cycle-level and trace-driven simulator for our simulations. http://code.google.com/p/macsim/
4.***write good title：A Workload-Aware Adaptive Hybrid Flash Translation Layer with an Efficient Caching Strategy author：Dongchul Park, Biplob Debnath and David H.C. Du from：10.1109/MASCOTS.2011.29 content： (1)propose a Convertible Flash Translation Layer (it can dynamically switch its mapping scheme to either a page level mapping or a block level mapping scheme to fully exploit the benefits of them) Moreover, we propose an efficient caching strategy to further improve the CFTL performance. (2) block_level mapping:read 为主的trace page_level mapping:write 为主的trace (3) mapping table is stored in the flash memory caching scheme **(4)计算page level map 1 TB of flash requires 4GB of memory space for the mapping table (assuming a 2KB page and 8 bytes per mapping entry) *(4) 引用的23-25，是trace *(5) 有R/W比例列表
week14
1.white paper Intel SSD DC S3500 Series Workload Characterization in RAID Configurations *（1）page 7，有张表 *（2）page 11, 不同random 比例下性能
2.review SSDExplorer: a Virtual Platform for Performance/Reliabilityoriented Fine-Grained Design Space Exploration of Solid State Drives author:Lorenzo Zuolo, Cristian Zambelli (1) EDA tools ? (2) this paper proposes SSDExplorer *(3)former research disk emulation tools [3] in virtual environments [4] pure software simulation tools[5] [3] J. Yoo, Y. Won, J. Hwang, S. Kang, J. Choi, S. Yoon, and J. Cha,“Vssim: Virtual machine based ssd simulator,” in IEEE Symposium on Mass Storage Systems and Technologies (MSST), 2013, pp. 1–14 [4] “QEMU: open source processor emulator.” [Online]. Available:http://wiki.qemu.org/Main Page [5] “The DiskSim simulation environment version 4.0,” 2008.[Online]. Available:http://www.pdl.cmu.edu/PDL-FTP/DriveChar/CMU-PDL-08-101.pdf (4)比较之前的Emulation Platforms/ Trace driven Platforms /Hardware Platforms,提出SSDExplorer Prenlatform 认为之前的：really miss ： is a clear exploration of the performance correlation between the host interface capabilities and the non-volatile memory subsystem involving all intermediate architectural blocks
3.review***图片可以参考 title：VSSD: Performance Isolation in a Solid -State Drive author：DA-WEI CHANG, HSIN-HUNG CHEN and WEI-JIAN SU（National Cheng Kung University） form：TODAES-2014
*可以回看一下3.1、3.2，讲主要技术
week15
1.重读 title：Estimating Information-TheoreticalNAND Flash Memory Storage Capacity and its Implication to Memory System Design Space Exploration from：TVLSI.2011. content：Guiqiang Dong， Ningde Xie, Chandra Varanasi, and Tong Zhang （1）1.9 bits/cell 表示 2 bit/cell 的利用率 （2）香浓理论来估计信道噪声影响 （3）难以准确估计，估计得上下限 （4）tradeoff：cell的利用率和使用寿命 （5）Monte Carlo simulations http://blog.csdn.net/mmbl007/article/details/6204003
2. title：Model-Driven Design-Space Exploration for Software-Intensive Embedded Systems author：Twan Basten, Martijn Hendriks, Lou Somers, and Nikola Trcka from: content： (1)Motivation:Software plays an increasingly important role in modern embedded systems, leading to a rapid increase in design complexity. (2)Industries typically adopt some form of model-based design for the software and hardware embedded in their systems.They provide a quick and easy method to explore alternatives at a high abstraction level. (3)用打印机的一个例子说明Octopus tool有效性。
3. title：Model-Driven Design-Space Exploration for Embedded Systems: The Octopus Toolset author：Twan Basten, Emiel van Benthum from： content： （1）
4. title：A Survey on Exact Cache Design Space Exploration Methodologies for Application Specific SoC Memory Hierarchies author：Isuru Nawinne,Sri Parameswaran from：ICIIS 2013 content： （1）capacity of a cache C：C = (B * S * A)Bytes （2） trace-driven simulation （3） use heuristics and design of experiment methods：avoid exploring the whole design space 接着介绍了几种cache的处理方法（没有细看）
5. title：A Survey on Design Space Exploration for Heterogeneous Multi-core author：Meena Belwal, Sudarshan TSB from：ICES 2014(International Conference on Embedded Systems ) content： （1）DSE is the process of discovering and evaluating design alternatives, prior to implementation. （2）图1 DSE流程图，以及图下的文字介绍。 （3）page 2 paragraph 2，介绍了DSE在HW/SW设计中的应用场景。 （4）从第三页开始，A/B/C/D/ 没部分第一段都是一类的应用
6. title：A Meta-Framework for Design Space Exploration author：Tripti Saxena and Gabor Karsai from：ECBS.2011.21 content： （1）abstract里有design space的定义 （2）introduce第二段，有不同的DSE的方法 （3）第三部分讲了一些设计要求（论文用？）
week16
1. title：Configurability of Performance and Overheads in Flash Management author：Tei-Wei Kuo from： content (1)Performance and overheads. (2)
2. title:The Behavior Analysis of Flash-Memory Storage Systems author：Tei-Wei Kuo