本编文章的目的主要用简明的方法对DDR3进行读写,当然这种方式每次读写都需要CPU干预,效率是比较低的,但是这是学习的过程吧。
本系列文章尽可能的让每一个实验都相对独立,过程尽可能保证完整性,保证实验的可重现性。 但是用到的模块或者IP的具体作用和用法不保证都重复详细的介绍。
本文所使用的开发板是兼容zedboard
PC 开发环境版本:Vivado 2015.4 Xilinx SDK 2015.4
生成硬件系统
新建vivado工程
选择Zedboard
新建Block Design
添加ZYNQ PS
点击Run Block Automation,让vivado自动配置好zedboard相关的默认的信息,点击OK
双击ZYNQ,在此可以去掉一些不用的外设
设置好的Block Design如图所示
在block design上右击,选择Create HDL Wapper
完成后,在block design上右击,选择Generate Output Prouducts,在弹出的对话框选择Generate
点击Generate Bitstream
完成后,选择File->Export->Export Hadfware,选中Include bitsteam
File -> Launch SDK,把硬件架构导出到软件工程
编写软件程序
新建Hello工程
DDR3的地址
建好后,在mem_demo_bsp->ps7->cortexa9_0的路径下,打开xparameters_ps.h这个头文件,这个头文件是cortexA9可以直接控制的外设地址的宏定义。在里面可以找到DDR的地址,可以看到如下代码:
/* Canonical definitions for DDR MEMORY */
#define XPAR_DDR_MEM_BASEADDR 0x00000000U
#define XPAR_DDR_MEM_HIGHADDR 0x3FFFFFFFU
等会我们要使用这个地址,对DDR3进行读写操作
读写操作函数
在mem_demo_bsp->ps7->cortexa9_0的路径下,打开xil_io.h这个头文件,这个头文件是cortexA9可以直接控制的内存映射或者映射到了地址空间的IO。在里面可以看到如下代码:
//从某个地址读数据
u8 Xil_In8(INTPTR Addr);
u16 Xil_In16(INTPTR Addr);
u32 Xil_In32(INTPTR Addr);
//向某个地址写数据。
void Xil_Out8(INTPTR Addr, u8 Value);
void Xil_Out16(INTPTR Addr, u16 Value);
void Xil_Out32(INTPTR Addr, u32 Value);
OK,有了这些就可以简单的对DDR进行续写操作了
代码实现
#include "stdio.h" #include "platform.h" #include "xparameters.h" #include "xparameters_ps.h"
#include "xil_printf.h" #include "xil_io.h" #define DDR_BASEARDDR XPAR_DDR_MEM_BASEADDR + 0x10000000 int main() { init_platform(); int i; int rev; xil_printf("Hello World "); for(i=0; i<32; i++) { Xil_Out32(DDR_BASEARDDR+i*4,i); } for(i=0; i<32; i++) { rev = Xil_In32(DDR_BASEARDDR+i*4); xil_printf("the address at %x data is : %x " ,DDR_BASEARDDR+i*4, rev); } cleanup_platform(); return 0; }
烧写测试
串口终端的结果如下:
Hello World
the address at 10000000 data is : 0
the address at 10000004 data is : 1
the address at 10000008 data is : 2
the address at 1000000C data is : 3
the address at 10000010 data is : 4
the address at 10000014 data is : 5
the address at 10000018 data is : 6
the address at 1000001C data is : 7
the address at 10000020 data is : 8
the address at 10000024 data is : 9
the address at 10000028 data is : A
the address at 1000002C data is : B
the address at 10000030 data is : C
the address at 10000034 data is : D
the address at 10000038 data is : E
the address at 1000003C data is : F
the address at 10000040 data is : 10
the address at 10000044 data is : 11
the address at 10000048 data is : 12
the address at 1000004C data is : 13
the address at 10000050 data is : 14
the address at 10000054 data is : 15
the address at 10000058 data is : 16
the address at 1000005C data is : 17
the address at 10000060 data is : 18
the address at 10000064 data is : 19
the address at 10000068 data is : 1A
the address at 1000006C data is : 1B
the address at 10000070 data is : 1C
the address at 10000074 data is : 1D
the address at 10000078 data is : 1E
the address at 1000007C data is : 1F