1.库的简述
对于一些常用的且不需要经常修改的函数，我们可以将它们封装到一个库文件(.dlb)中，同时创建一个.h文件，来声明库中的函数的接口。
比如我们这次要用的图像处理库，名字为“libadi_image_tool_box.dlb”，它的接口在“adi_image_tool_box.h”中声明。如果您熟悉模块化变成的规范，应该知道想要调用库中的函数，该做些什么了啊？没错，#include “adi_image_tool_box.h”即可，但由于该库中的一些函数与硬件紧密相关，因此还要做一些针对ldf文件的修改。下面请看详细步骤：
2.详细步骤：
1)到ADI官网下载“ImageProcessingToolbox-BF-Rel2.3.0_PROD.exe”，并任意安装到一个位置，可以得到一个同名目录，其中包含如下文件和文件夹：
2）在Include文件夹中，赋值4个文件到工程目录下，同时在工程中添加文件包含：
#include "adi_image_tool_box.h"
#include "adi_image_tool_box_defines.h"
#include "adi_float16.h"
#include "adi_tool_chain.h"
3)将库文件加入到工程中，如下图：(注意，此处不能用#include "xxx.dlb",否则会报错)
4)调用库中的函数
库中的函数大致分为两类，一类是native API，就是ADI的API函数，函数名称以"adi_"开头；还有一类是类OPENCV的API，以"cv“开头，使用类cv的API时还要进行一些其它的文件包含和初始化工作，这里就不多介绍了，感兴趣的朋友可以查看Documents下的帮助文档。
这里使用一个native API,例如：
if(test)
adi_sobel_3x3_horz_i8( (const uint8_t *)L2_CoreA_Data1,288,360, (int16_t *)L2_CoreA_Data2);
(函数的说明在Documents\Image_Tool_Box_ProductReferenceGuide_Rel2.3.0.pdf中)
编译该工程，会出现以下错误：
该Error是由上面的Warning产生的，集中问题解决Warnig即可。Warning的含义是：
在库tool_box.dlb中的目标文件soble_3x3_horz_i8.doJ中的一个段"adi_fast_prio0_code"没有被映射，我们将它进行映射即可，方法如下：
使用Open with source windows,打开ldf文件，将下面内容替换原文件中p0部分的内容(红色为修改过的部分)：
PROCESSOR p0 { MEMORY { MEM_A_L1_SCRATCH { START(0xFFB00000) END(0xFFB00FFF) TYPE(RAM) WIDTH(8) } MEM_A_L1_CODE_CACHE { START(0xFFA10000) END(0xFFA13FFF) TYPE(RAM) WIDTH(8) } MEM_A_L1_CODE { START(0xFFA00000) END(0xFFA03FFF) TYPE(RAM) WIDTH(8) } MEM_A_L1_DATA_B_CACHE { START(0xFF904000) END(0xFF907FFF) TYPE(RAM) WIDTH(8) } MEM_A_L1_DATA_B { START(0xFF900000) END(0xFF903FFF) TYPE(RAM) WIDTH(8) } MEM_A_L1_DATA_A_CACHE { START(0xFF804000) END(0xFF807FFF) TYPE(RAM) WIDTH(8) } MEM_A_L1_DATA_A { START(0xFF800000) END(0xFF803FFF) TYPE(RAM) WIDTH(8) } /*$VDSG<insert-new-memory-segments-for-CORE-A> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-new-memory-segments-for-CORE-A> */ } /* MEMORY */ OUTPUT($COMMAND_LINE_OUTPUT_DIRECTORY/p0.dxe) RESOLVE(start, 0xFFA00000) KEEP(start,_main) /*$VDSG<insert-user-ldf-commands-for-CORE-A> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-user-ldf-commands-for-CORE-A> */ SECTIONS { /* FEB1FC00->FEB1FFFF : Reserved in boot Phase for 2nd stage boot loader. */ RESERVE(___ssld=0xFEB1FC00, ___lssld = 0x400) /* Workaround for hardware errata 05-00-0189 and 05-00-0310 - ** "Speculative (and fetches made at boundary of reserved memory ** space) for instruction or data fetches may cause false ** protection exceptions" and "False hardware errors caused by ** fetches at the boundary of reserved memory ". ** ** Done by avoiding use of 76 bytes from at the end of blocks ** that are adjacent to reserved memory. Workaround is enabled ** for appropriate silicon revisions (-si-revision switch). */ RESERVE(___waba1=MEMORY_END(MEM_A_L1_SCRATCH) - 75, ___la1 = 76) RESERVE(___waba2=MEMORY_END(MEM_A_L1_CODE_CACHE) - 75, ___la2 = 76) RESERVE(___waba3=MEMORY_END(MEM_A_L1_CODE) - 75, ___la3 = 76) RESERVE(___waba5=MEMORY_END(MEM_A_L1_DATA_B) - 75, ___la5 = 76) RESERVE(___waba7=MEMORY_END(MEM_A_L1_DATA_A) - 75, ___la7 = 76) /*$VDSG<insert-new-sections-at-the-start-for-CORE-A> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-new-sections-at-the-start-for-CORE-A> */ scratchpad { INPUT_SECTION_ALIGN(4) /*$VDSG<insert-input-sections-at-the-start-of-scratchpad-for-CORE-A> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-start-of-scratchpad-for-CORE-A> */ INPUT_SECTIONS($OBJECTS_CORE_A(L1_A_scratchpad) $LIBRARIES_CORE_A(L1_A_scratchpad)) } > MEM_A_L1_SCRATCH L1_code { INPUT_SECTION_ALIGN(4) __CORE = 0; INPUT_SECTIONS($OBJECTS_CORE_A(L1_code) $LIBRARIES_CORE_A(L1_code) libadi_image_tool_box.dlb(adi_fast_prio0_code)) /*$VDSG<insert-input-sections-at-the-start-of-l1_code> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-start-of-l1_code> */ INPUT_SECTIONS($OBJECTS_CORE_A(VDK_ISR_code) $LIBRARIES_CORE_A(VDK_ISR_code)) INPUT_SECTIONS($OBJECTS_CORE_A(cplb) $LIBRARIES_CORE_A(cplb)) INPUT_SECTIONS($OBJECTS_CORE_A(cplb_code) $LIBRARIES_CORE_A(cplb_code)) INPUT_SECTIONS($OBJECTS_CORE_A(noncache_code) $LIBRARIES_CORE_A(noncache_code)) INPUT_SECTIONS($OBJS_LIBS_INTERNAL_CORE_A(program)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL_CORE_A(program)) INPUT_SECTIONS($OBJECTS_CORE_A(program) $LIBRARIES_CORE_A(program)) /*$VDSG<insert-input-sections-at-the-end-of-l1_code> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-end-of-l1_code> */ } > MEM_A_L1_CODE L1_code_cache { INPUT_SECTION_ALIGN(4) ___l1_code_cache = 0; INPUT_SECTIONS($OBJECTS_CORE_A(L1_code) $LIBRARIES_CORE_A(L1_code) libadi_image_tool_box.dlb(adi_fast_prio0_code)) /*$VDSG<insert-input-sections-at-the-start-of-l1_code_cache> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-start-of-l1_code_cache> */ INPUT_SECTIONS($OBJECTS_CORE_A(VDK_ISR_code) $LIBRARIES_CORE_A(VDK_ISR_code)) INPUT_SECTIONS($OBJECTS_CORE_A(cplb) $LIBRARIES_CORE_A(cplb)) INPUT_SECTIONS($OBJECTS_CORE_A(cplb_code) $LIBRARIES_CORE_A(cplb_code)) INPUT_SECTIONS($OBJS_LIBS_INTERNAL_CORE_A(program)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL_CORE_A(program)) INPUT_SECTIONS($OBJECTS_CORE_A(program) $LIBRARIES_CORE_A(program)) /*$VDSG<insert-input-sections-at-the-end-of-l1_code_cache> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-end-of-l1_code_cache> */ } > MEM_A_L1_CODE_CACHE L1_data_a_1 { INPUT_SECTION_ALIGN(4) ___l1_data_cache_a = 0; INPUT_SECTIONS($OBJECTS_CORE_A(L1_data_a) $LIBRARIES_CORE_A(L1_data_a)) /*$VDSG<insert-input-sections-at-the-start-of-l1_data_a> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-start-of-l1_data_a> */ RESERVE(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length = 2048,4) } > MEM_A_L1_DATA_A L1_data_a_bsz ZERO_INIT { INPUT_SECTION_ALIGN(4) INPUT_SECTIONS( $OBJECTS_CORE_A(L1_bsz) $LIBRARIES_CORE_A(L1_bsz)) } > MEM_A_L1_DATA_A L1_data_a { INPUT_SECTION_ALIGN(4) INPUT_SECTIONS($OBJECTS_CORE_A{DualCoreMem("CoreA")}(cplb_data) $LIBRARIES_CORE_A{DualCoreMem("CoreA")}(cplb_data)) INPUT_SECTIONS($OBJECTS_CORE_A(cplb_data) $LIBRARIES_CORE_A(cplb_data)) INPUT_SECTIONS($OBJECTS_CORE_A(voldata) $LIBRARIES_CORE_A(voldata)) INPUT_SECTIONS($OBJECTS_CORE_A(constdata) $LIBRARIES_CORE_A(constdata)) INPUT_SECTIONS($OBJS_LIBS_INTERNAL_CORE_A(data1)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL_CORE_A(data1)) INPUT_SECTIONS($OBJECTS_CORE_A(data1) $LIBRARIES_CORE_A(data1)) INPUT_SECTIONS($OBJECTS_CORE_A(.edt) $LIBRARIES_CORE_A(.edt)) INPUT_SECTIONS($OBJECTS_CORE_A(.cht) $LIBRARIES_CORE_A(.cht)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_appl_fastb0_prio0_rw) $LIBRARIES_CORE_A(adi_appl_fastb0_prio0_rw)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb0_prio0_temp) $LIBRARIES_CORE_A(adi_fastb0_prio0_temp)) /*$VDSG<insert-input-sections-at-the-end-of-l1_data_a> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-end-of-l1_data_a> */ } > MEM_A_L1_DATA_A bsz_L1_data_a ZERO_INIT { INPUT_SECTION_ALIGN(4) INPUT_SECTIONS($OBJECTS_CORE_A(bsz) $LIBRARIES_CORE_A(bsz)) } > MEM_A_L1_DATA_A L1_data_a_stack_heap { INPUT_SECTION_ALIGN(4) RESERVE_EXPAND(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length , 0, 4) ldf_heap_space = heaps_and_stack_in_L1_data_a; ldf_heap_end = (ldf_heap_space + (heaps_and_stack_in_L1_data_a_length - 4)) & 0xfffffffc; ldf_heap_length = ldf_heap_end - ldf_heap_space; } > MEM_A_L1_DATA_A L1_data_b_bsz ZERO_INIT { INPUT_SECTION_ALIGN(4) INPUT_SECTIONS( $OBJECTS_CORE_A(L1_bsz) $LIBRARIES_CORE_A(L1_bsz)) } > MEM_A_L1_DATA_B L1_data_b_tables { INPUT_SECTION_ALIGN(4) FORCE_CONTIGUITY INPUT_SECTIONS($OBJECTS_CORE_A(ctor) $LIBRARIES_CORE_A(ctor)) INPUT_SECTIONS($LIBRARIES_SML2_CM(ctor) $LIBRARIES_SML3_CM(ctor)) INPUT_SECTIONS($OBJECTS_CORE_A(ctorl) $LIBRARIES_CORE_A(ctorl)) INPUT_SECTIONS($OBJECTS_CORE_A(vtbl) $LIBRARIES_CORE_A(vtbl)) INPUT_SECTIONS($OBJECTS_CORE_A(.frt) $LIBRARIES_CORE_A(.frt)) INPUT_SECTIONS($OBJECTS_CORE_A(.rtti) $LIBRARIES_CORE_A(.rtti)) INPUT_SECTIONS($OBJECTS_CORE_A(.edt) $LIBRARIES_CORE_A(.edt)) INPUT_SECTIONS($OBJECTS_CORE_A(.cht) $LIBRARIES_CORE_A(.cht)) } > MEM_A_L1_DATA_B L1_data_b { INPUT_SECTION_ALIGN(4) ___l1_data_cache_b = 0; INPUT_SECTIONS($OBJECTS_CORE_A(L1_data_b) $LIBRARIES_CORE_A(L1_data_b)) /*$VDSG<insert-input-sections-at-the-start-of-l1_data_b> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-start-of-l1_data_b> */ RESERVE(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length = 2048,4) INPUT_SECTIONS($OBJS_LIBS_INTERNAL_CORE_A(data1)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL_CORE_A(data1)) INPUT_SECTIONS($OBJECTS_CORE_A(data1) $LIBRARIES_CORE_A(data1)) INPUT_SECTIONS($OBJECTS_CORE_A{DualCoreMem("CoreA")}(cplb_data) $LIBRARIES_CORE_A{DualCoreMem("CoreA")}(cplb_data)) INPUT_SECTIONS($OBJECTS_CORE_A(cplb_data) $LIBRARIES_CORE_A(cplb_data)) INPUT_SECTIONS($OBJECTS_CORE_A(voldata) $LIBRARIES_CORE_A(voldata)) INPUT_SECTIONS($OBJECTS_CORE_A(constdata) $LIBRARIES_CORE_A(constdata)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_appl_fastb1_prio0_rw) $LIBRARIES_CORE_A(adi_appl_fastb1_prio0_rw)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb1_prio0_temp) $LIBRARIES_CORE_A(adi_fastb1_prio0_temp)) /*$VDSG<insert-input-sections-at-the-end-of-l1_data_b> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-input-sections-at-the-end-of-l1_data_b> */ #ifdef GRAPHICS_DLB INPUT_SECTION_ALIGN(4) INPUT_SECTIONS(../../Support-Modules/graphics/Lib-Production-VDSP/libadi_graphics2d.dlb (adi_fastb0_prio0_temp)) //INPUT_SECTION_ALIGN(4) INPUT_SECTIONS(../../Support-Modules/graphics/Lib-Production-VDSP/libadi_graphics2d.dlb (adi_fastb0_prio1_temp)) #endif } > MEM_A_L1_DATA_B bsz_L1_data_b ZERO_INIT { INPUT_SECTION_ALIGN(4) INPUT_SECTIONS($OBJS_LIBS_INTERNAL_CORE_A(bsz)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL_CORE_A(bsz)) INPUT_SECTIONS($OBJECTS_CORE_A(bsz) $LIBRARIES_CORE_A(bsz)) } > MEM_A_L1_DATA_B p0_gdt { FORCE_CONTIGUITY INPUT_SECTION_ALIGN(4) INPUT_SECTIONS($OBJECTS_CORE_A(.gdt) $LIBRARIES_CORE_A(.gdt)) INPUT_SECTIONS($LIBRARIES_SML3_CM(.gdt)) INPUT_SECTIONS($LIBRARIES_SML2_CM(.gdt)) INPUT_SECTIONS($OBJECTS_CORE_A(.gdtl) $LIBRARIES_CORE_A(.gdtl)) INPUT_SECTIONS($LIBRARIES_SML3_CM(.gdtl)) INPUT_SECTIONS($LIBRARIES_SML2_CM(.gdtl)) } > MEM_A_L1_DATA_B L1_data_b_stack_heap { INPUT_SECTION_ALIGN(4) RESERVE_EXPAND(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length , 0, 4) ldf_stack_space = heaps_and_stack_in_L1_data_b; ldf_stack_end = (ldf_stack_space + (heaps_and_stack_in_L1_data_b_length - 4)) & 0xfffffffc; } > MEM_A_L1_DATA_B L1_code_lib { #ifndef ENABLE_I_CACHE INPUT_SECTION_ALIGN(4) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fast_prio0_code) $LIBRARIES_CORE_A(adi_fast_prio0_code)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fast_prio1_code) $LIBRARIES_CORE_A(adi_fast_prio1_code)) #endif } >MEM_A_L1_CODE_CACHE L1_code_sram_app { INPUT_SECTION_ALIGN(4) /*__CORE = 0;*/ INPUT_SECTIONS( $OBJECTS_CORE_A(ez_L1_code)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_appl_fast_prio0_code) $LIBRARIES_CORE_A(adi_appl_fast_prio0_code)) INPUT_SECTIONS( $OBJECTS_CORE_A(L1_code) $LIBRARIES_CORE_A(L1_code)) INPUT_SECTION_ALIGN(4) INPUT_SECTIONS(libdsp561y.dlb [ f32tou32z.doj(program) ]) INPUT_SECTION_ALIGN(4) INPUT_SECTIONS(libf64ieee561y.dlb (program)) } > MEM_A_L1_CODE L1_data_a_cache_lib { #ifndef ENABLE_D_CACHE INPUT_SECTION_ALIGN(4) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb0_prio0_rw) $LIBRARIES_CORE_A(adi_fastb0_prio0_rw)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb0_prio0_r) $LIBRARIES_CORE_A(adi_fastb0_prio0_r)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb0_prio2_rw) $LIBRARIES_CORE_A(adi_fastb0_prio2_rw)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb0_prio2_r) $LIBRARIES_CORE_A(adi_fastb0_prio2_r)) #endif } >MEM_A_L1_DATA_A_CACHE L1_data_b_cache_lib { #ifndef ENABLE_D_CACHE INPUT_SECTION_ALIGN(4) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb1_prio0_rw) $LIBRARIES_CORE_A(adi_fastb1_prio0_rw)) INPUT_SECTIONS($OBJECTS_CORE_A(adi_fastb1_prio0_r) $LIBRARIES_CORE_A(adi_fastb1_prio0_r)) #endif } >MEM_A_L1_DATA_B_CACHE /*$VDSG<insert-new-sections-at-the-end-for-CORE-A> */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG<insert-new-sections-at-the-end-for-CORE-A> */ } /* SECTIONS */ } /* p0 */
5）关闭ldf的源代码文件，保存，重新编译，link成功通过！
其它函数的使用方法基本相同。