Introduction
Control signaling is required to support the transmission of the downlink and uplink transport channels (DL-SCH and UL-SCH). Control information for one or multiple UEs is contained in a Downlink scheduling Control Information (DCI) message and is transmitted through the Physical Downlink Control Channel (PDCCH). DCI messages contain the following information.
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DL-SCH resource allocation (the set of resource blocks containing the DL-SCH) and modulation and coding scheme, which allows the UE to decode the DL-SCH.
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Transmit Power Control (TPC) commands for the Physical Uplink Control Channel (PUCCH) and UL-SCH, which adapt the transmit power of the UE to save power
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Hybrid-Automatic Repeat Request (HARQ) information including the process number and redundancy version for error correction
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MIMO precoding information
DCI Message Formats
Depending on the purpose of DCI message, different DCI formats are defined. The DCI formats are given in the following list.
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Format 0 — for transmission of uplink shared channel (UL-SCH) allocation
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Format 1 — for transmission of DL-SCH allocation for Single Input Multiple Output (SIMO) operation
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Format 1A — for compact transmission of DL-SCH allocation for SIMO operation or allocating a dedicated preamble signature to a UE for random access
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Format 1B — for transmission control information of multiple-input multiple-output (MIMO) rank-1 based compact resource assignment
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Format 1C — for very compact transmission of PDSCH assignment
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Format 1D — same as Format 1B, but with additional information of power offset
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Format 2 and Format 2A— for transmission of DL-SCH allocation for closed and open loop MIMO operation, respectively
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Format 2B — for the scheduling of dual layer transmission (antenna ports 7 & 8)
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Format 2C — for the scheduling of up to 8 layer transmission (antenna ports 7 to 14) using TM9
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Format 2D — for the scheduling of up to 8 layer transmission (antenna ports 7 to 14) using TM10
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Format 3 and Format 3A — for transmission of TPC command for an uplink channel
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Format 4 — for the scheduling of PUSCH with multi-antenna port transmission mode
In one subframe, multiple UE’s can be scheduled. Therefore, multiple DCI messages can be sent using multiple PDCCH’s.
PDCCH Restructuring
A PDCCH is transmitted on one or an aggregation of several consecutive control channel elements (CCEs). A CCE is a group of nine consecutive resource-element groups (REGs). The number of CCEs used to carry a PDCCH is controlled by the PDCCH format. A PDCCH format of 0, 1, 2, or 3 corresponds to 1, 2, 4, or 8 consecutive CCEs being allocated to one PDCCH.
DCI Message Generation
The base station creates a DCI message based on a DCI format given in TS 36.212, Section 5.3.3.1. Each field in a DCI message is mapped in order. Zeros may be appended to a DCI message to avoid ambiguous message lengths.
DCI Coding
To form the PDCCH payload, the DCI undergoes coding as shown in the following figure.
As multiple PDCCHs relevant to different UEs can be present in one subframe, the CRC is also used to specify to which UE a PDCCH is relevant. This is done by scrambling the CRC parity bits with the corresponding Radio Network Temporary Identifier (RNTI) of the UE. The scrambled CRC is obtained by performing a bit-wise XOR operation between the 16-bit calculated PDCCH CRC and the 16-bit RNTI.
Different RNTI can be used to scramble the CRC. The following RNTI are some examples.
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A UE unique identifier; for example, a Cell-RNTI
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A paging indication identifier, or Paging-RNTI, if the PDCCH contains paging information
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A system information identifier, or system information-RNTI, if the PDCCH contains system information
When encoding a format 0 DCI message, which contains the UE UL-SCH resource allocation, and the UE transmit antenna selection is configured and applicable, the RNTI scrambled CRC undergoes a bit-wise XOR operation with an antenna selection mask. This mask informs the UE transmit antenna on which port to transmit. The antenna selection masks are given in the following table.
| UE transmit antenna selection | Antenna selection mask, <x0AS, …, x15AS> |
|---|---|
| UE Port 0 | <0,0,0,0,0,0,0,0,0,0,0,0,0,0,0> |
| UE Port 1 | <0,0,0,0,0,0,0,0,0,0,0,0,0,0,1> |
LTE uses a rate ⅓ tail-biting encoder with a constraint length, k, of 7. This means that one in three bits of the output contain useful information while the other two add redundancy(namely the code rate is one third). The structure of the convolutional encoder is shown in the following figure.
Each output stream of the coder is obtained by convolving the input with the impulse response of the encoder, as shown in the following equation.
d(i)k→Ck∗Gi
The impulse responses are called the generator sequences of the coder. For LTE, there are the following three generator sequences.
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G0=133 (octal)
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G1=171 (octal)
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G2=165 (octal)
A standard convolutional encoder initializes its internal shift register to the all zeros state, and also ensures that the coder finishes in the all zeros state by padding the input sequence with k zeros at the end. Knowing the start and end states, which are all zeros, simplifies the design of the decoder, which is typically an implementation of the Viterbi algorithm.
A tail biting convolutional coder initializes its internal shift register to the last k bits of the current input block, rather than to the all zeros state. Thus, the start and end states are the same, without the need to zero-pad the input block. Since the overhead of terminating the coder has been eliminated, the output block contains fewer bits than a standard convolutional coder. The drawback is that the decoder becomes more complicated because the initial state is unknown; however, the decoder does know the start and end states are the same.
Rate Matching
The rate matching block creates an output bitstream with a desired code rate. As the number of bits available for transmission depends on the available resources the rate matching algorithm is capable of producing any arbitrary rate. The three bitstreams from the turbo encoder are interleaved followed by bit collection to create a circular buffer. Bits are selected and pruned from the buffer to create an output bitstream with the desired code rate. The process is illustrated in the following figure.
Sub-block Interleaver. The three sub-block interleavers used in the rate matching block are identical. Interleaving is a technique to reduce the impact of burst errors on a signal as consecutive bits of data will not be corrupted.
The sub-block interleaver reshapes the encode bit sequence, row-by-row, to form a matrix with CTCSubblock=32 columns and RTCSubblock rows. The variable RTCSubblock is determined by finding the minimum integer such that the number of encoded input bits is D≤(RTCSubblock×CTCSubblock). If (RTCSubblock×CTCSubblock)>D, ND <NULL>’s are appended onto the front of the encoded sequence. In this case, ND+D=(RTCSubblock×CTCSubblock).
Inter-column permutation is performed on the matrix to reorder the columns as shown in the following pattern.
| 1, 17, 9, 25, 5, 21, 13, 29, 3, 19, 11, 27, 7, 23, 15, 31, 0, 16, 8, 24, 4, 20, 12, 28, 2, 18, 10, 26, 6, 22, 14, 30 |
The output of the block interleaver is the bit sequence read out column-by-column from the inter-column permutated matrix to create a stream Kπ=(RTCSubblock×CTCSubblock) bits long.
Bit Collection, Selection, and Transmission. The bit collection stage creates a virtual circular buffer by combining the three interleaved encoded bit streams, as shown in the following figure.
Bits are then selected and pruned from the circular buffer to create an output sequence length which meets the desired code rate. This is achieved by sequentially outputting the bits in the circular buffer from w0 (looping back to w0 after w3Kπ–1), discarding <NULL> bits, until the length of the output is x times the length of the input, creating a coding rate of 1/x.
Reference,
1. MathWorks