前段时间以红牛开发板为主，在其上成功移植了.NET Micro Framework（请参见我以前写的系列移植文章：链接），最近开始在ST下一代Cortex-M3芯片STM32F207的平台上移植.NET Micro Framework（马上要推出的.NET Micro Framework教育箱第二代），由于目前STM32F207并没有公开发布，一般网友目前仅知道芯片的相关参数指标，而不知道相关寄存器的情况，所以在评估未来基于STM32F207芯片的产品开发周期的时候，难免会误判，这里就顺便把STM32F103ZE和STM32F207ZG的芯片区别（特别是寄存器区别）罗列了出来。
一、功能区别（主要）
|
型号 |
片内 Flash |
RAM |
定时器 |
SPI |
I2C |
USB/ CAN |
USART |
Ethernet |
ADC/ DAC |
GPIO | ||
|
普通 |
高级 |
基本 | ||||||||||
|
103 |
512K |
64K |
4 |
2 |
2 |
3 |
3 |
1/1 |
5 |
0 |
3/1 |
112 |
|
207 |
1M |
128K |
10 |
2 |
2 |
3 |
3 |
OTG/2 |
6 |
1 |
24/2 |
144 |
注：103主频：72M 207主频：120M 含camera接口
二、寄存器区别
|
项目 |
寄存器名 |
103 |
207 |
说明 |
|
CRC |
CRC_DR |
√ |
√ |
相同 |
|
CRC_IDR |
√ |
√ |
相同 | |
|
CRC_CR |
√ |
√ |
相同 | |
|
PWR |
PWR_CR |
√ |
√ |
207比103多1项配置 |
|
PWR_CSR |
√ |
√ |
207比103多1项配置 | |
|
RCC |
RCC_CR |
√ |
√ |
无区别 |
|
RCC_PLLCFGR |
× |
√ |
||
|
RCC_CFGR |
√ |
√ |
多项配置不同 | |
|
RCC_CIR |
√ |
√ |
多项配置不同 | |
|
RCC_AHB1RSTR |
× |
√ |
||
|
RCC_AHB2RSTR |
× |
√ |
||
|
RCC_AHB3RSTR |
× |
√ |
||
|
RCC_APB1RSTR |
√ |
√ |
多项配置不同 | |
|
RCC_APB1RSTR |
√ |
√ |
多项配置不同 | |
|
RCC_AHB1ENR |
× |
√ |
||
|
RCC_AHB2ENR |
× |
√ |
||
|
RCC_AHB3ENR |
× |
√ |
||
|
RCC_APB1ENR |
√ |
√ |
多项配置不同 | |
|
RCC_APB2ENR |
√ |
√ |
多项配置不同 | |
|
RCC_BDCR |
√ |
√ |
相同 | |
|
RCC_CSR |
√ |
√ |
207比103多1项配置 | |
|
RCC_SSCGR |
× |
√ |
||
|
GPIO |
GPIOx_OSPEEPER |
× |
√ |
|
|
GPIOB_OSPEEPER |
× |
√ |
||
|
GPIOA_PUPDR |
× |
√ |
||
|
GPIOB_PUPDR |
× |
√ |
||
|
GPIOx_PUPDR |
× |
√ |
||
|
GPIOx_IDR |
√ |
√ |
相同 | |
|
GPIOx_ODR |
√ |
√ |
相同 | |
|
GPIOx_BSSR |
√ |
√ |
相同 | |
|
GPIOx_LCKR |
√ |
√ |
相同 | |
|
GPIOx_AFRL |
× |
√ |
||
|
GPIOx_AFRH |
× |
√ |
||
|
GPIOx_CRL |
√ |
× |
||
|
GPIOx_CRH |
√ |
× |
||
|
AFIO |
-- |
√ |
× |
|
|
SYSCFG |
-- |
× |
√ |
|
|
NVIC |
中断个数 |
60 |
83 |
其中有几项中断地址相同，但有区别 |
|
EXTI |
6个寄存器项 |
√ |
√ |
207比103多4个配置项 |
|
DMA |
DMA_ISR |
√ |
× |
|
|
DMA_IFCR |
√ |
× |
||
|
DMA_CCR1 |
√ |
× |
||
|
DMA_CNDTR1 |
√ |
× |
||
|
DMA_CMAR1 |
√ |
× |
||
|
DMA_CCR2 |
√ |
× |
||
|
DMA_CNDTR2 |
√ |
× |
||
|
DMA_CPAR2 |
√ |
× |
||
|
DMA_CMAR2 |
√ |
× |
||
|
DMA_CCR3 |
√ |
× |
||
|
DMA_CNDTR3 |
√ |
× |
||
|
DMA_CPAR3 |
√ |
× |
||
|
DMA_CMAR3 |
√ |
× |
||
|
DMA_CCR4 |
√ |
× |
||
|
DMA_CNDTR4 |
√ |
× |
||
|
DMA_CPAR4 |
√ |
× |
||
|
DMA_CMAR4 |
√ |
× |
||
|
DMA_CCR5 |
√ |
× |
||
|
DMA_CNDTR5 |
√ |
× |
||
|
DMA_CPAR5 |
√ |
× |
||
|
DMA_CMAR5 |
√ |
× |
||
|
DMA_CCR6 |
√ |
× |
||
|
DMA_CNDTR6 |
√ |
× |
||
|
DMA_CPAR6 |
√ |
× |
||
|
DMA_CMAR6 |
√ |
× |
||
|
DMA_CCR7 |
√ |
× |
||
|
DMA_CNDTR7 |
√ |
× |
||
|
DMA_CPAR7 |
√ |
× |
||
|
DMA_CMAR7 |
√ |
× |
||
|
DMA_LISR |
× |
√ |
||
|
DMA_HISR |
× |
√ |
||
|
DMA_LIFCR |
× |
√ |
||
|
DMA_HIFCR |
× |
√ |
||
|
DMA_S0CR |
× |
√ |
||
|
DMA_S0NDTR |
× |
√ |
||
|
DMA_S0PAR |
× |
√ |
||
|
DMA_S0M0AR |
× |
√ |
||
|
DMA_S0M1AR |
× |
√ |
||
|
DMA_S0FCR |
× |
√ |
||
|
DMA_S1CR |
× |
√ |
||
|
DMA_S1NDTR |
× |
√ |
||
|
DMA_S1PAR |
× |
√ |
||
|
DMA_S1M0AR |
× |
√ |
||
|
DMA_S1M1AR |
× |
√ |
||
|
DMA_S1FCR |
× |
√ |
||
|
DMA_S2CR |
× |
√ |
||
|
DMA_S2NDTR |
× |
√ |
||
|
DMA_S2PAR |
× |
√ |
||
|
DMA_S2M0AR |
× |
√ |
||
|
DMA_S2M1AR |
× |
√ |
||
|
DMA_S2FCR |
× |
√ |
||
|
DMA_S3CR |
× |
√ |
||
|
DMA_S3NDTR |
× |
√ |
||
|
DMA_S3PAR |
× |
√ |
||
|
DMA_S3M0AR |
× |
√ |
||
|
DMA_S3M1AR |
× |
√ |
||
|
DMA_S3FCR |
× |
√ |
||
|
DMA_S4CR |
× |
√ |
||
|
DMA_S4NDTR |
× |
√ |
||
|
DMA_S4PAR |
× |
√ |
||
|
DMA_S4M0AR |
× |
√ |
||
|
DMA_S4M1AR |
× |
√ |
||
|
DMA_S4FCR |
× |
√ |
||
|
DMA_S5CR |
× |
√ |
||
|
DMA_S5NDTR |
× |
√ |
||
|
DMA_S5PAR |
× |
√ |
||
|
DMA_S5M0AR |
× |
√ |
||
|
DMA_S5M1AR |
× |
√ |
||
|
DMA_S5FCR |
× |
√ |
||
|
DMA_S6CR |
× |
√ |
||
|
DMA_S6NDTR |
× |
√ |
||
|
DMA_S6PAR |
× |
√ |
||
|
DMA_S6M0AR |
× |
√ |
||
|
DMA_S6M1AR |
× |
√ |
||
|
DMA_S6FCR |
× |
√ |
||
|
DMA_S7CR |
× |
√ |
||
|
DMA_S7NDTR |
× |
√ |
||
|
DMA_S7PAR |
× |
√ |
||
|
DMA_S7M0AR |
× |
√ |
||
|
DMA_S7M1AR |
× |
√ |
||
|
DMA_S7FCR |
× |
√ |
||
|
ADC |
ADC_SR |
√ |
√ |
207比103多1项配置 |
|
ADC_CR1 |
√ |
√ |
多项配置不同 | |
|
ADC_CR2 |
√ |
√ |
多项配置不同 | |
|
ADC_SMPR1 |
√ |
√ |
相同 | |
|
ADC_SMPR2 |
√ |
√ |
相同 | |
|
ADC_JOFFR1 |
√ |
√ |
相同 | |
|
ADC_JOFFR2 |
√ |
√ |
相同 | |
|
ADC_JOFFR3 |
√ |
√ |
相同 | |
|
ADC_JOFFR4 |
√ |
√ |
相同 | |
|
ADC_HTR |
√ |
√ |
相同 | |
|
ADC_LTR |
√ |
√ |
相同 | |
|
ADC_SQR1 |
√ |
√ |
相同 | |
|
ADC_SQR2 |
√ |
√ |
相同 | |
|
ADC_SQR3 |
√ |
√ |
相同 | |
|
ADC_JSQR |
√ |
√ |
相同 | |
|
ADC_JDR1 |
√ |
√ |
相同 | |
|
ADC_JDR2 |
√ |
√ |
相同 | |
|
ADC_JDR3 |
√ |
√ |
相同 | |
|
ADC_JDR4 |
√ |
√ |
相同 | |
|
ADC_DR |
√ |
√ |
103比207多16项配置 | |
|
ADC_CSR |
× |
√ |
||
|
ADC_CCR |
× |
√ |
||
|
ADC_CDR |
× |
√ |
||
|
DAC |
DAC_CR |
√ |
√ |
相同 |
|
DAC_SWTRIGR |
√ |
√ |
相同 | |
|
DAC_DHR12R1 |
√ |
√ |
相同 | |
|
DAC_DHR12L1 |
√ |
√ |
相同 | |
|
DAC_DHR8R1 |
√ |
√ |
相同 | |
|
DAC_DHR12R2 |
√ |
√ |
相同 | |
|
DAC_DHR12L2 |
√ |
√ |
相同 | |
|
DAC_DHR8R2 |
√ |
√ |
相同 | |
|
DAC_DHR12LD |
√ |
√ |
相同 | |
|
DAC_DHR12RD |
√ |
√ |
相同 | |
|
DAC_DHR8RD |
√ |
√ |
相同 | |
|
DAC_DOR1 |
√ |
√ |
相同 | |
|
DAC_DOR2 |
√ |
√ |
相同 | |
|
DAC_SR |
× |
√ |
||
|
DCMI |
-- |
× |
√ |
|
|
高级定时器 |
22个寄存器项 |
√ |
√ |
相同 |
|
普通定时器 |
TIMx_CR1 |
√ |
√ |
相同 |
|
TIMx_CR2 |
√ |
√ |
相同 | |
|
TIMx_SMCR |
√ |
√ |
相同 | |
|
TIMx_DIER |
√ |
√ |
207比103多1项配置 | |
|
TIMx_SR |
√ |
√ |
207比103多1项配置 | |
|
TIMx_EGR |
√ |
√ |
相同 | |
|
TIMx_CCMR1 |
√ |
√ |
相同 | |
|
TIMx_CCMR2 |
√ |
√ |
相同 | |
|
TIMx_CCER |
√ |
√ |
多项配置不同 | |
|
TIMx_CNT |
√ |
√ |
增加多项配置 | |
|
TIMx_PSC |
√ |
√ |
增加多项配置 | |
|
TIMx_ARR |
√ |
√ |
增加多项配置 | |
|
TIMx_CCR1 |
√ |
√ |
增加多项配置 | |
|
TIMx_CCR2 |
√ |
√ |
增加多项配置 | |
|
TIMx_CCR3 |
√ |
√ |
增加多项配置 | |
|
TIMx_CCR4 |
√ |
√ |
增加多项配置 | |
|
TIMx_DCR |
√ |
√ |
相同 | |
|
TIMx_DMAR |
√ |
√ |
相同 | |
|
TIM2_OR |
× |
√ |
||
|
TIM5_OR |
× |
√ |
||
|
TIM9-TMR14 |
-- |
× |
√ |
|
|
基本定时器 |
8个寄存器项 |
√ |
√ |
相同 |
|
RTC |
RTC_TR |
× |
√ |
|
|
RTC_DR |
× |
√ |
||
|
RTC_CR |
× |
√ |
||
|
RTC_ISR |
× |
√ |
||
|
RTC_PRER |
× |
√ |
||
|
RTC_WUTR |
× |
√ |
||
|
RTC_CALIBR |
× |
√ |
||
|
RTC_ALRMAR |
× |
√ |
||
|
RTC_ALRMBR |
× |
√ |
||
|
RTC_WPR |
× |
√ |
||
|
RTC_TSTR |
× |
√ |
||
|
RTC_RSDR |
× |
√ |
||
|
RTC_TAFCR |
× |
√ |
||
|
RTC_BK0R |
× |
√ |
||
|
RTC_BK19R |
× |
√ |
||
|
RTC_CRH |
√ |
× |
||
|
RTC_CRL |
√ |
× |
||
|
RTC_PRLH |
√ |
× |
||
|
RTC_PRLL |
√ |
× |
||
|
RTC_DIVH |
√ |
× |
||
|
RTC_DIVL |
√ |
× |
||
|
RTC_CNTH |
√ |
× |
||
|
RTC_CNTL |
√ |
× |
||
|
RTC_ALRH |
√ |
× |
||
|
RTC_ALRL |
√ |
× |
||
|
IWDG |
4个寄存器项 |
√ |
√ |
相同 |
|
WWDG |
3个寄存器项 |
√ |
√ |
相同 |
|
CRYP |
-- |
× |
√ |
|
|
HASH |
-- |
× |
√ |
|
|
RNG |
-- |
× |
√ |
|
|
I2C |
9个寄存器项 |
√ |
√ |
相同 |
|
USART |
USART_SR |
√ |
√ |
相同 |
|
USART_DR |
√ |
√ |
相同 | |
|
USART_BRR |
√ |
√ |
相同 | |
|
USART_CR1 |
√ |
√ |
207比103多1项配置 | |
|
USART_CR2 |
√ |
√ |
相同 | |
|
USART_CR3 |
√ |
√ |
相同 | |
|
USART_GTPR |
√ |
√ |
相同 | |
|
SPI |
9个寄存器项 |
√ |
√ |
相同 |
|
SDIO |
18个寄存器项 |
√ |
√ |
相同 |
|
FSMC |
25个寄存器项 |
√ |
√ |
相同 |
|
CAN |
66个寄存器项 |
√ |
√ |
有6个寄存器项不同（207比103多配置项） |
|
Ethernet |
-- |
× |
√ |
|
|
USB-OTG-FS |
-- |
× |
√ |
|
|
USB-OTG-HS |
-- |
× |
√ |
|
|
USB（device） |
-- |
√ |
× |
|
|
略 |
√ |
√ |
注：√ 表示存在寄存器项 ×表示不存在
