【iCore4 双核心板_FPGA】例程七：状态机实验——状态机使用

实验现象：
按键每按下一次，三色LED改变一次状态。

核心代码：

//--------------------module_rst_n---------------------------//
module state_ctrl(
    input clk_25m,
    input rst_n,
    input key,
    output fpga_ledr,
    output fpga_ledg,
    output fpga_ledb
);
//--------------------key_in--------------------------------//
parameter ms_10 = 250000;
reg key_r;
reg [17:0]low_cnt;
reg [17:0]hig_cnt;

always @(posedge clk_25m or negedge rst_n)    //按键消抖动，提取按键状态
    if (!rst_n)
        begin
            key_r <= 1'd0;
            low_cnt <= 18'd0;
            hig_cnt <= 18'd0;
        end
    else if(key)                                    //检测按键状态为高时，延时10ms，把按键状态提取出来。
        begin
            low_cnt <= 18'd0;
            if (hig_cnt == ms_10)
                begin
                    key_r <= key;
                    hig_cnt <= hig_cnt;
                end
            else hig_cnt <= hig_cnt + 1'd1;
        end
    else                                                    //按键状态为低时，延时10ms，把按键状态提取出来。
        begin
            hig_cnt <= 18'd0;
            if (low_cnt == ms_10)
                begin
                    key_r <= key;
                    low_cnt <= low_cnt;
                end
            else low_cnt <= low_cnt + 1'd1;
        end
        
wire key_state = key_r;
//--------------------led_ctrl-----------------------------//
reg [1:0]led_cnt;
reg ledr,ledg,ledb;

always@(negedge key_state or negedge rst_n)    //按键下降沿控制led状态切换
    if (!rst_n)
        begin
            led_cnt <= 2'd0;
        end
    else if (led_cnt == 2'd2)
        begin
            led_cnt <= 2'd0;
        end
    else led_cnt <= led_cnt + 1'd1;

always@(posedge clk_25m or negedge rst_n)        //led状态切换的状态机
    if (!rst_n)
        begin
            ledr <= 1'd1;
            ledg <= 1'd1;
            ledb <= 1'd1;
        end
    else case(led_cnt)
            2'd0:                                            //红灯亮
                begin
                    ledr <= 1'd0;
                    ledg <= 1'd1;
                    ledb <= 1'd1;
                end
            2'd1:                                            //绿灯亮
                begin
                    ledr <= 1'd1;
                    ledg <= 1'd0;
                    ledb <= 1'd1;
                end
            2'd2:                                            //蓝灯亮
                begin
                    ledr <= 1'd1;
                    ledg <= 1'd1;
                    ledb <= 1'd0;
                end
                default:                                    //都不亮
                begin
                    ledr <= 1'd1;
                    ledg <= 1'd1;
                    ledb <= 1'd1;
                end
        endcase    
        
assign {fpga_ledr,fpga_ledg,fpga_ledb} = {ledr,ledg,ledb};

//--------------------endmodule-----------------------------//
endmodule

源代码下载链接：

链接：http://pan.baidu.com/s/1nvMFgxF 密码：b895

iCore4链接：