目录
Route基本知识
1、Route阶段先布哪些线?
布时钟线和LVL的VDD_core_net
Memory Block
1、设置天线规则
2、布时钟线
get所有的clock nets
对所有的clock nets设置NDR
define_routing_rule cts_ndr
-width {M2 0.1 M3 0.1 M4 0.1 M5 0.1}
-spacings {M2 0.1 M3 0.1 M4 0.1 M5 0.1}
set_net_routing $clk_nets -rule cts_ndr
route_zrt_group -nets $clk_nets
该命令“Performs routing on a group of nets in the design using Zroute.
You should use this command before signal routing to route critical nets
such as clock nets or timing-critical nets”
3、执行初始signal布线
route_opt
-initial_route_only
-effort high
4、执行ECO 布线
route_zrt_eco
"Performs ECO routing on the design. This command should be used after signal routing has
been completed. It should not be used to route nets after signal routing. Instead the group
route command (route_zrt_group) should be used"
5、执行一些DFM的工作,如插filler
6、保存出verilog,milkway cell
write_verilog
7、总结
memory block用到了M1-M5,power ring和power strap使用金属层M4和M5,route使用金属层M2-M5,clock走线使用M2-M5