https://mp.weixin.qq.com/s/L5eAwv--WzZdr-CfW2-XNA
/** Wrappers for valid interfaces and associated circuit generators using them. */ package chisel3.util import chisel3._ import chisel3.core.CompileOptions import chisel3.experimental.DataMirror import chisel3.internal.naming.chiselName // can't use chisel3_ version because of compile order /** An Bundle containing data and a signal determining if it is valid */ class Valid[+T <: Data](gen: T) extends Bundle { val valid = Output(Bool()) val bits = Output(gen) def fire(dummy: Int = 0): Bool = valid override def cloneType: this.type = Valid(gen).asInstanceOf[this.type] } /** Adds a valid protocol to any interface */ object Valid { def apply[T <: Data](gen: T): Valid[T] = new Valid(gen) }