I've always thought this was easier to learn with a detailed example, so here's how I think of makefiles. For each section you have one line that's not indented and it shows the name of the section followed by dependencies. The dependencies can be either other sections (which will be run before the current section) or files (which if updates will cause the current section to be run again).
Here's a quick example (keep in mind that I'm using 4 spaces where I should be using a tab, SO won't let me use tabs):
all: a3driver.o
g++-o a3driver a3driver.o
a3driver.o: a3driver.cpp
g++-c a3driver.cpp
When you type make, it will choose the first section (all). all depends on a3driver.o, so it will go to that section. a3driver.o depends on a3driver.cpp, so it will only run if a3driver.cpp has changed since it was last run. Assuming it has (or has never been run), it will compile a3driver.cpp to a .o file, then go back to all and compile that into the file executable.
Since there's only one file, it could even be reduced to:
a3driver: a3driver.cpp
g++-o a3driver a3driver.cpp
The reason I showed the first example is that it shows the power of makefiles. If you need to compile another file, you can just add another section. Here's an example with a secondFile.cpp (which loads in a header named secondFile.h):
all: a3driver.o secondFile.o
g++-o a3driver a3driver.o secondFile.o
a3driver.o: a3driver.cpp
g++-c a3driver.cpp
secondFile.o: secondFile.cpp secondFile.h
g++-c secondFile.cpp
This way if you change something in secondFile.cpp or secondFile.h and recompile, it will only recompile secondFile.cpp (not a3driver.cpp). Or alternately, if you change something in a3driver.cpp, it won't recompile secondFile.cpp.
######################################################################################################
Dependency are a tree of rules that look like this:
main_target : source1 source2 etc command to build main_target from sources source1 : dependents for source1 command to build source1
There must be a blank line after the commands for a target, and there must not be a blank line before the commands. The first target in the makefile is the overall goal, other targets are built only if the first target depends on them.
So your makefile will look something like this.
a3a.exe : a3driver.obj link /out:a3a a3driver.obj a3driver.obj : a3driver.cpp cc a3driver.cpp
PS: Harvest from Stackflow http://stackoverflow.com/questions/2481269/how-to-make-simple-c-makefile