COMPUTER ORGANIZATION AND ARCHITECTURE DESIGNING FOR PERFORMANCE NINTH EDITION
RAM technology is divided into two technologies: dynamic and
static. A dynamic RAM (DRAM) is made with cells that store data as charge on
capacitors. The presence or absence of charge in a capacitor is interpreted as a
binary 1 or 0. Because capacitors have a natural tendency to discharge, dynamic
RAMs require periodic charge refreshing to maintain data storage. The term
dynamic refers to this tendency of the stored charge to leak away, even with power
continuously applied.
Computer Systems A Programmer's Perspective Second Edition
SRAM stores each bit in a bistable memory cell. Each cell is implemented with
a six-transistor circuit. This circuit has the property that it can stay indefinitely
in either of two different voltage configurations, or states.
Any other state will
be unstable—starting from there, the circuit will quickly move toward one of the
stable states. Such a memory cell is analogous to the inverted pendulum illustrated
in Figure 6.1.
The pendulum is stable when it is tilted either all the way to the left or all the
way to the right. From any other position, the pendulum will fall to one side or the
other. In principle, the pendulum could also remain balanced in a vertical position
indefinitely, but this state is metastable—the smallest disturbance would make it
start to fall, and once it fell it would never return to the vertical position.
Due to its bistable nature, an SRAM memory cell will retain its value indef-
initely, as long as it is kept powered. Even when a disturbance, such as electrical
noise, perturbs the voltages, the circuit will return to the stable value when the
disturbance is removed.
metastable 亚稳的，相对稳定的
DRAM stores each bit as charge on a capacitor. This capacitor is very small—
typically around 30 femtofarads, that is, 30×10−15
farads. Recall, however, that
a farad is a very large unit of measure. DRAM storage can be made very dense—
each cell consists of a capacitor and a single access transistor. Unlike SRAM,
however, a DRAM memory cell is very sensitive to any disturbance. When the
capacitor voltage is disturbed, it will never recover. Exposure to light rays will
cause the capacitor voltages to change. In fact, the sensors in digital cameras and
camcorders are essentially arrays of DRAM cells.
Various sources of leakage current cause a DRAM cell to lose its charge
within a time period of around 10 to 100 milliseconds. Fortunately, for computers
operating with clock cycle times measured in nanoseconds, this retention time is
quite long. The memory system must periodically refresh every bit of memory by
reading it out and then rewriting it. Some systems also use error-correcting codes,
where the computer words are encoded a few more bits (e.g., a 32-bit word might
be encoded using 38 bits), such that circuitry can detect and correct any single
erroneous bit within a word.
Figure 6.2 summarizes the characteristics of SRAM and DRAM memory.
SRAM is persistent as long as power is applied. Unlike DRAM, no refresh is
necessary. SRAM can be accessed faster than DRAM. SRAM is not sensitive to
disturbances such as light and electrical noise. The trade-off is that SRAM cells
use more transistors than DRAM cells, and thus have lower densities, are more
expensive, and consume more power.