From: http://zhidao.baidu.com/question/214944467.html
From: http://en.wikipedia.org/wiki/Cache_coherence
首先明白什么是缓存，缓存是介于物理存储与CPU处理之间的一段内存空间，主要用于存储从物理存储读出、或者要写入的数据，这需要硬件或者软件支持。如果读取或写入物理存储中的一个字节或一段数据，如果没有缓存，那么每次的读写请求都会直接访问物理存储，而物理存储的速度一般都比较慢，而且物理定位也比较慢，缓存使用后，可以一次性读出需要的数据相邻的数据，暂时存储在缓存中，下面如果还要读取，而这部分数据已经在缓存了，就不需要再去读取物理存储，同样，如果是写操作，可以先将需要写入的数据暂时保存在缓存中，等到缓存过期或者强行清空时，再一次写入物理存储。这样可以把多次的物理存储访问，变成一次物理存储的访问，提高访问效率。具体的操作算法这里不多作阐述。
缓存的一致性就是指缓存中的数据是否和目标存储中的数据是一样的，也就是说缓存中已经修改得数据是否已经保存到了物理存储中，物理存储中已经被修改得内容，是否与缓存的内容是一样的。这就是一致性的概念。
In computing, cache coherence (also cache coherency) refers to the consistency of data stored in local caches of a shared resource.
In a shared memory multiprocessor system with a separate cache memory for each processor, it is possible to have many copies of any one instruction operand: one copy in the main memory and one in each cache memory. When one copy of an operand is changed, the other copies of the operand must be changed also. Cache coherence is the discipline that ensures that changes in the values of shared operands are propagated throughout the system in a timely fashion.
There are three distinct levels of cache coherence:
- Every write operation appears to occur instantaneously
- All processes see exactly the same sequence of changes of values for each separate operand
- Different processes may see an operation and assume different sequences of values (this is considered noncoherent behavior)
In both level 2 behavior and level 3 behavior, a program can observe stale data. Recently, computer designers have come to realize that the programming discipline required to deal with level 2 behavior is sufficient to deal also with level 3 behavior.[citation needed] Therefore, at some point only level 1 and level 3 behavior will be seen in machines.[citation needed]