9.6 Interrupt Tasks and Interrupt Procedures 中断任务和中断处理程序
Just as a CALL instruction can call either a procedure or a task, so an interrupt or exception can "call" an interrupt handler that is either a procedure or a task. When responding to an interrupt or exception, the processor uses the interrupt or exception identifier to index a descriptor in the IDT. If the processor indexes to an interrupt gate or trap gate, it invokes the handler in a manner similar to a CALL to a call gate. If the processor finds a task gate, it causes a task switch in a manner similar to a CALL to a task gate.
由于CALL指令可以调用程序或任务，所以中断或异常可以“调用”（call）一个程序或任务的中断处理。当个中断或异常时，处理器使用中断或异常标识在IDT中索引一个描述符。如果处理器索引到一个中断门或陷阱门，它以一个与调用（CALL）一个调用门类似的方式来激活这个处理程序。如果处理器找到一个任务门，它用与调用（CALL）一个任务门类似的方式切换任务。
9.6.1 Interrupt Procedures 中断处理
An interrupt gate or trap gate points indirectly to a procedure which will execute in the context of the currently executing task as illustrated by Figure 9-4 . The selector of the gate points to an executable-segment descriptor in either the GDT or the current LDT. The offset field of the gate points to the beginning of the interrupt or exception handling procedure.
中断门或陷阱门间接指向一个程序，这个程序执行在当前执行任务的上下文中，正如图9-4所示。门选择子指向一个可很执行段的描述符，这个描述符即可在GDT中，也可以在当前的LDT中。门的偏移字段指向中断或异常处理程序的起始部分。
The 80386 invokes an interrupt or exception handling procedure in much the same manner as it CALLs a procedure; the differences are explained in the following sections.
80386激活一个中断或异常处理程序，其方式与调用（CALL）一个程序基本相同；随后的章节解释不同部分。
9.6.1.1 Stack of Interrupt Procedure 中断处理程序的栈
Just as with a control transfer due to a CALL instruction, a control transfer to an interrupt or exception handling procedure uses the stack to store the information needed for returning to the original procedure. As Figure 9-5 shows, an interrupt pushes the EFLAGS register onto the stack before the pointer to the interrupted instruction.
正如CALL指令引发的控制转移一样，控制转移到一个中断或异常处理程序时也使用栈来保存返回到原程序时需要的信息。如图9-5所示，在指向中断的指令之前，中断会将EFLAGS寄存器压入到栈中。（译注：下图中所示不同特权级之间的中断处理使用的栈是高特权级的栈。即，在这种情况下，会发生栈切换，处理器会自动切换到高特权级栈中进行中断处理，将内容都压到高特权级栈中。）
Certain types of exceptions also cause an error code to be pushed on the stack. An exception handler can use the error code to help diagnose the exception.
某些类型的异常也会将错误代码压入到栈中。一个异常处理程序可以使用错误代码帮助诊断异常。
9.6.1.2 Returning from an Interrupt Procedure
从中断处理程序返回
An interrupt procedure also differs from a normal procedure in the method of leaving the procedure. The IRET instruction is used to exit from an interrupt procedure.IRET is similar to RET except that IRET increments ESP by an extra four bytes (because of the flags on the stack) and moves the saved flags into the EFLAGS register. The IOPL field of EFLAGS is changed only if the CPL is zero. The IF flag is changed only if CPL <= IOPL.
中断处理程序在离开程序的方式上与普通程序不同。IRET指令用来从中断处理程序退出。IRET与RET相似，聊了IRET会用额外的4个字节增加ESP值（栈是向下增长的，加4是因为栈上比普通程序多压入了一个的标志寄存器值），并且将保存的标志移回EFLAGS寄存器。仅当CPL等于0时，EFLAGS中的IOPL字段被修改。IF标志仅当CPL小于或等于IOPL时被修改。
9.6.1.3 Flags Usage by Interrupt Procedure 中断处理程序中标志的用法
Interrupts that vector through either interrupt gates or trap gates cause TF (the trap flag) to be reset after the current value of TF is saved on the stack as part of EFLAGS. By this action the processor prevents debugging activity that uses single-stepping from affecting interrupt response. A subsequent IRET instruction restores TF to the value in the EFLAGS image on the stack.
标识指向中断门或陷阱门的中断在将当前TF值作为EFLAGS的一部分保存在栈上后重置TF（陷阱标志）。通过这个动作，处理器阻止使用单步跟踪的调试活动，这些调试活动会影响中断响应。随后IRET指令会恢复TF到保存在栈上的EFLAGS中的TF值。
The difference between an interrupt gate and a trap gate is in the effect on IF (the interrupt-enable flag). An interrupt that vectors through an interrupt gate resets IF, thereby preventing other interrupts from interfering with the current interrupt handler. A subsequent IRET instruction restores IF to the value in the EFLAGS image on the stack. An interrupt through a trap gate does not change IF.
中断门工陷阱门的不同在于对TF（中断使能标志）的影响上。向量指向中断门的中断会重置TF，因此阻止其他中断干扰当前中断处理程序。随后的IRET指令会恢复TF值到保存在栈上的EFLAGS中的TF值。而指向陷阱门的中断不会修改TF。
9.6.1.4 Protection in Interrupt Procedures 中断处理程序中的保护
The privilege rule that governs interrupt procedures is similar to that for procedure calls: the CPU does not permit an interrupt to transfer control to a procedure in a segment of lesser privilege (numerically greater privilege level) than the current privilege level. An attempt to violate this rule results in a general protection exception.
特权中断处理程序的管理与程序调用相似：CPU不允许一个中断向比当前特权级别低的特权级别（数值较大的特权级别）的程序转移控制。违反这条规则的企图会引发一般保护异常。
Because occurrence of interrupts is not generally predictable, this privilege rule effectively imposes restrictions on the privilege levels at which interrupt and exception handling procedures can execute. Either of the following strategies can be employed to ensure that the privilege rule is never violated.
因为中断的发生通常是不可预见的，这条特权规则强制在那些能运行中断和异常处理程序的特权等级上。下面的任何一条策略的实行都用来确保特权规则永远不被违反。
- Place the handler in a conforming segment. This strategy suits the handlers for certain exceptions (divide error, for example). Such a handler must use only the data available to it from the stack. If it needed data from a data segment, the data segment would have to have privilege level three, thereby making it unprotected.
处理程序放在一致性段中。这条策略适用于某些异常处理（例如，除法错误）。这样一个处理程序必须仅使用来自栈上的有效数据。如果它需要的数据来自数据段，这个数据段必须具有特权级别3，因此标记为非保护的。
- Place the handler procedure in a privilege level zero segment.
将处理程序放在特权级0的段中。
9.6.2 Interrupt Tasks 中断任务
A task gate in the IDT points indirectly to a task, as Figure 9-6 illustrates. The selector of the gate points to a TSS descriptor in the GDT.
IDT中的一个间接指向一个任务的任务门，正如图9-6解释的那样。门选择子指向位于GDT中的一个TSS描述符。
When an interrupt or exception vectors to a task gate in the IDT, a task switch results. Handling an interrupt with a separate task offers two advantages:
当中断或异常指向IDT中的一个任务门，会引发任务切换。使用独立的任务处理中断提供了两个好处：
- The entire context is saved automatically.
可以自动保存完整的上下文环境。
- The interrupt handler can be isolated from other tasks by giving it a separate address space, either via its LDT or via its page directory.
通过给定的独立地址空间，一个中断处理程序可以同其他任务隔离开，这个地址空间即可以通过LDT给定，也可以通过它的页目录给定。
The actions that the processor takes to perform a task switch are discussed in Chapter 7. The interrupt task returns to the interrupted task by executing an IRETinstruction.
处理器执行任务切换的动作在第7章中讨论。中断任务返回到一个被中断的任务是通过执行IRET指令。
If the task switch is caused by an exception that has an error code, the processor automatically pushes the error code onto the stack that corresponds to the privilege level of the first instruction to be executed in the interrupt task.
如果任务切换是由一个带有错误代码的异常引发的，处理器自动将错误代码压入到栈中,这个栈具有与中断任务中第一条被执行的指令一致的特权级别。（译注：也就是说如果中断任务是特权级0，则栈也是特权级0。换句话说，如果在中断处理中出现了特权级的转换，则栈也必转换。）
When interrupt tasks are used in an operating system for the 80386, there are actually two schedulers: the software scheduler (part of the operating system) and the hardware scheduler (part of the processor's interrupt mechanism). The design of the software scheduler should account for the fact that the hardware scheduler may dispatch an interrupt task whenever interrupts are enabled.
当在针面向80386的操作系统中使用中断任务，实际上有两个调度：软件调度（操作系统的部分）和硬件调度（处理器的中断机制的部分）。软件调度的设计应当面对一个事实，硬件调度在中断使能时任何时间都可能会派发一个中断任务。