5.1 Segment Translation 段转换
Figure 5-2 shows in more detail how the processor converts a logical address into a linear address.
图5-2展示了处理器将一个逻辑地址转换为线性地址的细节。
To perform this translation, the processor uses the following data structures:
处理器使用以下数据结构实现转换：
- Descriptors 描述符
- Descriptor tables 描述符表
- Selectors 选择子
- Segment Registers 段寄存器
5.1.1 Descriptors 描述符
The segment descriptor provides the processor with the data it needs to map a logical address into a linear address. Descriptors are created by compilers, linkers, loaders, or the operating system, not by applications programmers. Figure 5-3 illustrates the two general descriptor formats. All types of segment descriptors take one of these formats. Segment-descriptor fields are:
段寄存器为处理器提供了逻辑地址转换为线性地址所需要的数据。描述符由编译器、连接器、装载器或操作系统提供，而不能由应用程序提供。图5-3解释了两种通用的描述符格式。所有的段描述符类型都使用其中一种。段描述符字段为：
BASE: Defines the location of the segment within the 4 gigabyte linear address space. The processor concatenates the three fragments of the base address to form a single 32-bit value.
基址（BASE）：定义了一个段的4G线性地址空间的超始位置。处理器将三处的段基址组成一个32位值。
LIMIT: Defines the size of the segment. When the processor concatenates the two parts of the limit field, a 20-bit value results. The processor interprets the limit field in one of two ways, depending on the setting of the granularity bit:
段限长（LIMIT）：定义段大小。处理器将两部分的组成一个20位的段限长值。处理器使用以下两种方式之一来解释段限长，这依赖于描述符的粒度位设置：
- In units of one byte, to define a limit of up to 1 megabyte.
一个单元为一个字节，定义限长为1M。
- In units of 4 Kilobytes, to define a limit of up to 4 gigabytes. The limit is shifted left by 12 bits when loaded, and low-order one-bits are inserted.
一个单元为4K字节，最长到4G。限长在载和时左移12位，从低字节处插入位。
Granularity bit: Specifies the units with which the LIMIT field is interpreted. When thebit is clear, the limit is interpreted in units of one byte; when set, the limit is interpreted in units of 4 Kilobytes.
粒度位：指定一个单元，段限长如何解释。当该位被清空时，限长被解释了每个单元一个字节；当置位时，限长被解释成一个单元4K字节。
TYPE: Distinguishes between various kinds of descriptors.
类型：用来区分多种描述符。
DPL (Descriptor Privilege Level): Used by the protection mechanism (refer to Chapter 6 ) .
特权级别描述（DPL）：保护机制使用（参见第6章）
Segment-Present bit: If this bit is zero, the descriptor is not valid for use in address transformation; the processor will signal an exception when a selector for the descriptor is loaded into a segment register. Figure 5-4 shows the format of a descriptor when the present-bit is zero. The operating system is free to use the locations marked AVAILABLE. Operating systems that implement segment-based virtual memory clear the present bit in either of these cases:
段存在位：该位为0时，描述符对于地址转换不可用；当该描述符的选择子被装入段寄存器时处理器会生成一个异常。图5-4展示了当存在伴是0时描述符的格式。在以下两种情况时实现基于段的虚拟内存的操作系统会清空存在位：
- When the linear space spanned by the segment is not mapped by the paging mechanism.
当一个跨段的线性地址空间未被分面机制映射时。
- When the segment is not present in memory.
当一个段不在内存中时。
Accessed bit: The processor sets this bit when the segment is accessed; i.e., a selector for the descriptor is loaded into a segment register or used by a selector test instruction. Operating systems that implement virtual memory at the segment level may, by periodically testing and clearing this bit, monitor frequency of segment usage.
访问位：处理器当段被访问时处理器设置该位；比如：一个描述符的选择子被装入段寄存器或被选择子测试指令使用时。实现分段虚拟内存的操作系统可以通过临时测试和清空这些位来监视接下来的段使用。
Creation and maintenance of descriptors is the responsibility of systems software, usually requiring the cooperation of compilers, program loaders or system builders, and therating system.
创建和保持描述符是系统软件的责任，通常需要编译器、程序装载器或系统构建和协作。
5.1.2 Descriptor Tables
描述符表
Segment descriptors are stored in either of two kinds of descriptor table:
段描述符可以被存储在下面两种描述符表中：
- The global descriptor table (GDT) 全局描述符表（GDT）
- A local descriptor table (LDT) 本地描述符表（LDT）
A descriptor table is simply a memory array of 8-byte entries that contain descriptors, as Figure 5-5 shows. A descriptor table is variable in length and may contain up to 8192 (2^(13)) descriptors. The first entry of the GDT (INDEX=0) is not used by the processor, however.
正如图5-5所示，段描述符表是一个箱单的内存数组，每个项为8字节，包含一个描述符。描述符表长度可变，最多可以包含8192（2^32）个描述符。但是，处理器并不使用GDT的第一项描述符。
The processor locates the GDT and the current LDT in memory by means of the GDTR and LDTR registers. These registers store the base addresses of the tables in the linear address space and store the segment limits. The instructions LGDT and SGDT give access to the GDTR; the instructions LLDT and SLDT give access to the LDTR.
处理器通过GDTR和LDTR寄存器的值定位GDT和LDT在内存中的位置。这些寄存器保存描述符表在线性地址空间中的基址和段限长。指令LGDT和SGDt用来访问GDTR寄存器；指令LLDT和SLDT访问LDTR寄存器。
5.1.3 Selectors 选择子
The selector portion of a logical address identifies a descriptor by specifying a descriptor table and indexing a descriptor within that table. Selectors may be visible to applications programs as a field within a pointer variable, but the values of selectors are usually assigned (fixed up) by linkers or linking loaders.Figure 5-6 shows the format of a selector.
逻辑地址中的选择子部分通过指定一个描述符表和描述符在表中的索引来标识一个描述符。选择子对于应用程序可以作为指针变量的一部分，但是其值通常是连接器或装载器指定。图5-6展示了一个选择子的格式。
Index: Selects one of 8192 descriptors in a descriptor table. The processor simply multiplies this index value by 8 (the length of a descriptor), and adds the result to the base address of the descriptor table in order to access the appropriate segment descriptor in the table.
索引：8192个描述符表项中的一个。处理器简单地将这个索引值乘以8（一个描述符的长度），然后将其结果加到描述符的基址上，用来访问一个表中所描述的一个段。
Table Indicator: Specifies to which descriptor table the selector refers. A zero indicates the GDT; a one indicates the current LDT.
表声明（TI）：指定选择子所引用的哪个描述符表。当该位为0时表明为GDT；当为1时表示为LDT。
Requested Privilege Level: Used by the protection mechanism. (Refer to Chapter 6)
需要的特权级别（RPL）：保护机制使用。（参见第6章）
Because the first entry of the GDT is not used by the processor, a selector that has an index of zero and a table indicator of zero (i.e., a selector that points to the first entry of the GDT), can be used as a null selector. The processor does not cause an exception when a segment register (other than CS or SS) is loaded with a null selector. It will, however, cause an exception when the segment register is used to access memory. This feature is useful for initializing unused segment registers so as to trap accidental references.
因为处理器不使用GDT的第一项，所以一个索引项为0（一个指向GDT第一项的选择子）的选择子和描述符表为0，可以被当作一个空选择子。当一个空选择子被装入段寄存器时（CS或SS）时，处理器并不产生异常。然而，当处理器使用该段来访问内存时会导致一个异常。
5.1.4 Segment Registers 段寄存器
The 80386 stores information from descriptors in segment registers, thereby avoiding the need to consult a descriptor table every time it accesses memory.
80386将描述符信息存在段寄存器中，这样避免了每次访问内存都去访问描述符表。
Every segment register has a "visible" portion and an "invisible" portion, as Figure 5-7 illustrates. The visible portions of these segment address registers are manipulated by programs as if they were simply 16-bit registers. The invisible portions are manipulated by the processor.
每个段寄存器都有一个隐含的部分和一个可见的部分，正如图5-7所示。可见部分被程序当作一个简单的16位寄存来操控。不可见部分由处理器操控。
The operations that load these registers are normal program instructions (previously described in Chapter 3). These instructions are of two classes:
将其装入这些寄存器操作是普通的程序指令（见前面第3章所述）。这些指令分为两类：
- Direct load instructions; for example, MOV, POP, LDS, LSS, LGS, LFS. These instructions explicitly reference the segment registers.
直接装入指令；例如：MOV、POP、LDS、LSS、LGS、LFS。这些指令明确引用这些段寄存器。
- Implied load instructions; for example, far CALL and JMP. These instructions implicitly reference the CS register, and load it with a new value.
隐含地装入指令；例如：远程调用CALL和远程跳转JMP指令。这些指令隐含地引用CS寄存器，并将一个新值装入CS寄存器。
Using these instructions, a program loads the visible part of the segment register with a 16-bit selector. The processor automatically fetches the base address, limit, type, and other information from a descriptor table and loads them into the invisible part of the segment register.
使用这些指令，程序将一个16位选择子装入段寄存器的可见部分。处理器自动从描述表中取得基址、段限长、类型和其他信息，并将其装入段寄存器的不可见部分。
Because most instructions refer to data in segments whose selectors have already been loaded into segment registers, the processor can add the segment-relative offset supplied by the instruction to the segment base address with no additional overhead.
对于大部分指令而言，其引用的段内数据，其段的选择子已装入段寄存器，处理器无需要额外的指令就可以将段内偏移加到段基址上提供给指令使用。