数字系统设计练习（五）—— 选择语句的使用

一、实验硬软件环境：

1. EDA软件：Vivado2019
2. 实验开发板：Basys3 FPGA套件

二、实验内容：

　　实现的电路功能为：实验板上的四个按键对应四个led灯，按键按下，对应的led灯点亮；几个按键按下则有几个对用的led灯点亮。

　　要求分别使用if/else以及case语句进行逻辑功能描述。

三、具体实现

1. 设计源码
   • if/else语句

     `timescale 1ns / 1ps
     //////////////////////////////////////////////////////////////////////////////////
     // Company: 
     // Engineer: 
     // 
     // Create Date: 2020/08/16 20:31:23
     // Design Name: 
     // Module Name: led
     // Project Name: 
     // Target Devices: 
     // Tool Versions: 
     // Description: 
     // 
     // Dependencies: 
     // 
     // Revision:
     // Revision 0.01 - File Created
     // Additional Comments:
     // 
     //////////////////////////////////////////////////////////////////////////////////
     
     
     module led(
         input [3:0] key,
         output reg [3:0] led
         );
         
         always@(key)
         begin
             if(key[0] == 1)
                 led[0] = 1;
             else
                 led[0] = 0;
             if(key[1] == 1)
                 led[1] = 1;
             else 
                 led[1] = 0;
             if(key[2] == 1)
                 led[2] = 1;
             else 
                 led[2] = 0;
             if(key[3] == 1)
                 led[3] = 1;
             else
                 led[3] = 0;
         end
         
     endmodule

   • case语句

     `timescale 1ns / 1ps
     //////////////////////////////////////////////////////////////////////////////////
     // Company: 
     // Engineer: 
     // 
     // Create Date: 2020/08/16 20:45:18
     // Design Name: 
     // Module Name: led
     // Project Name: 
     // Target Devices: 
     // Tool Versions: 
     // Description: 
     // 
     // Dependencies: 
     // 
     // Revision:
     // Revision 0.01 - File Created
     // Additional Comments:
     // 
     //////////////////////////////////////////////////////////////////////////////////
     
     
     module led(key, led);
         input [3:0] key;
         output reg [3:0] led;
         
         always @(key)
         begin
             case(key)
                 4'b0001: led = key;
                 4'b0010: led = key;
                 4'b0100: led = key;
                 4'b1000: led = key;
                 default: led = 4'b0000;
             endcase
         end
         
     endmodule

2. 仿真代码

   `timescale 1ns / 1ps
   //////////////////////////////////////////////////////////////////////////////////
   // Company: 
   // Engineer: 
   // 
   // Create Date: 2020/08/17 09:51:40
   // Design Name: 
   // Module Name: led_tb
   // Project Name: 
   // Target Devices: 
   // Tool Versions: 
   // Description: 
   // 
   // Dependencies: 
   // 
   // Revision:
   // Revision 0.01 - File Created
   // Additional Comments:
   // 
   //////////////////////////////////////////////////////////////////////////////////
   
   
   module led_tb;
       reg [3:0] key;
       wire [3:0] led;
       
       led uut(.key(key), .led(led));
       
       initial
       begin
           key = 4'b0000;
           
           #100 key = 4'b0001;
           #100 key = 4'b0000;
           #50 key = 4'b0010;
           #50 key = 4'b0100;
           #50 key = 4'b1000;
           #50 key = 4'b1111;
           #50 $stop;
       end
   endmodule

3. 波形图
4. 约束文件

   set_property PACKAGE_PIN V17 [get_ports key[0]]
   set_property IOSTANDARD LVCMOS33 [get_ports key[0]]
   set_property PACKAGE_PIN V16 [get_ports key[1]]
   set_property IOSTANDARD LVCMOS33 [get_ports key[1]]
   set_property PACKAGE_PIN W16 [get_ports key[2]]
   set_property IOSTANDARD LVCMOS33 [get_ports key[2]]
   set_property PACKAGE_PIN W17 [get_ports key[3]]
   set_property IOSTANDARD LVCMOS33 [get_ports key[3]]
   set_property PACKAGE_PIN U16 [get_ports led[0]]
   set_property IOSTANDARD LVCMOS33 [get_ports led[0]]
   set_property PACKAGE_PIN E19 [get_ports led[1]]
   set_property IOSTANDARD LVCMOS33 [get_ports led[1]]
   set_property PACKAGE_PIN U19 [get_ports led[2]]
   set_property IOSTANDARD LVCMOS33 [get_ports led[2]]
   set_property PACKAGE_PIN V19 [get_ports led[3]]
   set_property IOSTANDARD LVCMOS33 [get_ports led[3]]