mips cpu 产生exception/interrupt后，cpu 会跳到特定的几个地址上,
BEV=0时，一般的在0x80000180,当然还有些其他地址，详细的要去看mips书籍
这里有这样的代码
FUNC_START(other_vector)
mfc0 k0,cause # K0 = exception cause
nop
andi k0,k0,0x7F # isolate exception code
la k1,hal_vsr_table # address of VSR table
add k1,k1,k0 # offset of VSR entry
lw k1,0(k1) # k1 = pointer to VSR
jr k1 # go there
nop # (delay slot)
FUNC_END(other_vector)
从cause 里取出exception ExcCode,然后到hal_vsr_table 取相应的处理vsr,
hal_vsr_table的内容是由 hal_mon_init 填充的
.macro hal_mon_init
la a0,__default_interrupt_vsr
la a1,__default_exception_vsr
la a3,hal_vsr_table
sw a0,0(a3)
sw a1,1*4(a3)
sw a1,2*4(a3)
sw a1,3*4(a3)
sw a1,4*4(a3)
sw a1,5*4(a3)
sw a1,6*4(a3)
sw a1,7*4(a3)
sw a1,8*4(a3)
sw a1,9*4(a3)
sw a1,10*4(a3)
sw a1,11*4(a3)
sw a1,12*4(a3)
sw a1,13*4(a3)
sw a1,14*4(a3)
sw a1,15*4(a3)
sw a1,32*4(a3)
sw a1,33*4(a3)
sw a1,34*4(a3)
.endm
这里填充的是__default_interrupt_vsr和__default_exception_vsr,
ExcCode=0是interrupt,其他的都是exception,就是说产生interrupt会调用
__default_interrupt_vsr，产生exception会调用__default_exception_vsr。
下面的就是这两段代码
##-----------------------------------------------------------------------------
## Default exception VSR.
## Saves machine state and calls external handling code.
FUNC_START(__default_exception_vsr)
# We enter here with all of the CPU state still
# in its registers except:
# K0 = vector index
# K1 = address of this function
move k1,sp # K1 = original SP
>>保存现场到堆栈
addi sp,sp,-mips_exception_decrement
# space for registers + safety margin
sw k0,mipsreg_vector(sp) # store vector
# store GPRs
.set noat
sgpr 0,sp
sgpr 1,sp
sgpr 2,sp
sgpr 3,sp
sgpr 4,sp
sgpr 5,sp
sgpr 6,sp
sgpr 7,sp
sgpr 8,sp
sgpr 9,sp
sgpr 10,sp
sgpr 11,sp
sgpr 12,sp
sgpr 13,sp
sgpr 14,sp
sgpr 15,sp
sgpr 16,sp
sgpr 17,sp
sgpr 18,sp
sgpr 19,sp
sgpr 20,sp
sgpr 21,sp
sgpr 22,sp
sgpr 23,sp
sgpr 24,sp
sgpr 25,sp
# sgpr 26,sp # == K0
# sgpr 27,sp # == K1
sgpr 28,sp # == GP
# sgpr 29,sp # == SP
sgpr 30,sp # == FP
sgpr 31,sp # == RA
.set at
mfhi a0
mflo a1
shi a0,sp
slo a1,sp
# K1 contains original SP
ssp k1,sp # store in reg dump
# save remaining machine state registers
mfc0 t0,cause
mfc0 t1,status
mfc0 t2,cachectrl
mvafc0 t3,badvr
mfc0 t4,config
mfc0 t5,prid
mvafc0 t6,epc
sw t0,mipsreg_cause(sp)
sw t1,mipsreg_sr(sp)
sw t2,mipsreg_cachectrl(sp)
sva t3,mipsreg_badvr(sp)
sw t4,mipsreg_config(sp)
sw t5,mipsreg_prid(sp)
sva t6,mipsreg_pc(sp)
hal_fpu_save sp
# The machine state is now all saved on the stack.
hal_diag_excpt_start
# Load Global Pointer register.
la gp,_gp
move s0,sp # save pointer to saved state
>>exception可以有自己的stack
#if defined(CYGSEM_HAL_ROM_MONITOR) &&
defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
la a0,__interrupt_stack # a0 = stack top
la a1,__interrupt_stack_base # a1 = stack base
sub a3,sp,a1 # a3 = sp - base
bltz a3,1f # not on istack if < 0
nop # delay slot
sub t0,a0,sp # t0 = top - sp
bgtz t0,8f # already on istack if > 0
nop # delay slot
1:
move sp,a0 # switch to istack
8:
addi sp,sp,-8 # space for old SP
# (8 to keep dword alignment!)
sw s0,0(sp) # save old SP on stack
#endif
addi sp,sp,-mips_stack_frame_size # make a null frame
# Need to set up back pointers etc. ???
hal_cpu_except_enable # reenable exceptions
>>调用cyg_hal_exception_handler，带入的参数是当前的堆栈指针，可以用来
>>打印发生exception时所有寄存器值,就是上面保存的现场
.extern cyg_hal_exception_handler
jal cyg_hal_exception_handler # call C code
move a0,s0 # arg0 = register dump (delay slot)
#if defined(CYGSEM_HAL_ROM_MONITOR) &&
defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
# If we are returning from the last nested exception, move back
# to the thread stack.
# Since we have arranged for the top of stack location to
# contain the sp we need to go back to here, just pop it off
# and put it in SP.
lw sp,mips_stack_frame_size(sp) # sp = *sp
subu sp,sp,mips_stack_frame_size # make a null frame
#endif
j restore_state
nop
FUNC_END(__default_exception_vsr)
##------------------------------------------------------------------------------
## Default interrupt VSR.
## Saves machine state and calls appropriate ISR. When done, calls
## interrupt_end() to finish up and possibly reschedule.
FUNC_START(__default_interrupt_vsr)
# We enter here with all of the CPU state still
# in its registers except:
# K0 = vector index
# K1 = address of this function
move k1,sp # K1 = original SP
>>同样是保存现场到堆栈
addi sp,sp,-mips_exception_decrement
# space for registers + safety margin
sw k0,mipsreg_vector(sp) # store vector
# store GPRs
.set noat
sgpr 0,sp
sgpr 1,sp
sgpr 2,sp
sgpr 3,sp
sgpr 4,sp
sgpr 5,sp
sgpr 6,sp
sgpr 7,sp
sgpr 8,sp
sgpr 9,sp
sgpr 10,sp
sgpr 11,sp
sgpr 12,sp
sgpr 13,sp
sgpr 14,sp
sgpr 15,sp
sgpr 16,sp
sgpr 17,sp
sgpr 18,sp
sgpr 19,sp
sgpr 20,sp
sgpr 21,sp
sgpr 22,sp
sgpr 23,sp
sgpr 24,sp
sgpr 25,sp
# sgpr 26,sp # == K0
# sgpr 27,sp # == K1
sgpr 28,sp # == GP
# sgpr 29,sp # == SP
sgpr 30,sp # == FP
sgpr 31,sp # == RA
.set at
mfhi a0
mflo a1
shi a0,sp
slo a1,sp
# K1 contains original SP
ssp k1,sp # store in reg dump
mfc0 t1,status
mfc0 t2,cachectrl
mvafc0 t3,epc
sw t1,mipsreg_sr(sp)
sw t2,mipsreg_cachectrl(sp)
sva t3,mipsreg_pc(sp)
hal_fpu_save sp
# The machine state is now all saved on the stack.
# Load Global Pointer register.
la gp,_gp
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
.extern cyg_scheduler_sched_lock
la v0,cyg_scheduler_sched_lock
lw a0,0(v0)
addi a0,a0,1
sw a0,0(v0)
#endif
move s0,sp # save pointer to saved state
>>interrupt也可以有自己的stack
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
la a0,__interrupt_stack # a0 = stack top
la a1,__interrupt_stack_base # a1 = stack base
sub a3,sp,a1 # a3 = sp - base
bltz a3,1f # not on istack if < 0
nop # delay slot
sub t0,a0,sp # t0 = top - sp
bgtz t0,8f # already on istack if > 0
nop # delay slot
1:
move sp,a0 # switch to istack
8:
addi sp,sp,-8 # space for old SP
# (8 to keep dword alignment!)
sw s0,0(sp) # save old SP on stack
#endif
subu sp,sp,mips_stack_frame_size # make a null frame
# Need to set up back pointers etc. ???
# Decode external interrupt via interrupt controller
>>解析出是那个中断产生,并根据系统的需求做中断号的转换
hal_intc_decode s2
# Here, s2 contains the number of the interrupt being serviced,
# we need to derive from that the vector number to call in the ISR
# table.
hal_intc_translate s2,s1
# Here s1 is the number of the vector to be called and s2 is
# the number of the interrupt being serviced.
hal_diag_intr_start
#if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
# Call cyg_instrument to record that this interrupt is being raised.
li a0,0x0301 # a0 = type = INTR,RAISE
move a1,s1 # a1 = vector number
jal cyg_instrument # call instrument function
move a2,s2 # a2 = interrupt number
#endif
#if defined(CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT)
# If we are supporting Ctrl-C interrupts from GDB, we must squirrel
# away a pointer to the save interrupt state here so that we can
# plant a breakpoint at some later time.
.extern hal_saved_interrupt_state
la v0,hal_saved_interrupt_state
sw s0,0(v0)
#endif
sll s1,s1,2 # s1 = byte offset of vector
hal_cpu_except_enable # reenable exceptions
>>到hal_interrupt_handlers table中，调用相对应的ISR,中断服务程序
>>hal_interrupt_handlers里面的内容就是user在做中断注册时写入的，
>>中断注册用cyg_drv_interrupt_attach()
la t2,hal_interrupt_handlers # handler table
add t2,t2,s1 # address of ISR ptr
lw t2,0(t2) # ISR pointer
la a1,hal_interrupt_data # data table
add a1,a1,s1 # address of data ptr
lw a1,0(a1) # Data pointer
move a0,s2 # pass interrupt number
move a2,s0 # pass saved interrupt state
jalr t2 # call ISR via t2
nop # (delay slot)
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
# If we are returning from the last nested interrupt, move back
# to the thread stack. interrupt_end() must be called on the
# thread stack since it potentially causes a context switch.
# Since we have arranged for the top of stack location to
# contain the sp we need to go back to here, just pop it off
# and put it in SP.
lw sp,mips_stack_frame_size(sp) # sp = *sp
subu sp,sp,mips_stack_frame_size # make a null frame
#endif
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
# We only need to call _interrupt_end() when there is a kernel
# present to do any tidying up.
# On return v0 bit 1 will indicate whether a DSR is
# to be posted. Pass this together with a pointer to
# the interrupt object we have just used to the
# interrupt tidy up routine.
# Note that s0, s1 and s2 are defined to be preserved across
# calls by the calling convention, so they still contain
# the register dump, the vector offset and the interrupt number
# respectively.
move s2,v0
la a1,hal_interrupt_objects # interrupt object table
add a1,a1,s1 # address of object ptr
lw a1,0(a1) # a1 = object ptr
move a2,s0 # arg3 = saved register dump
>>在有KERNEL系统中，提供一个入口去处理DSR 和schedule switch
.extern interrupt_end
jal interrupt_end # call into C to finish off
move a0,v0 # put ISR result in arg0
move v0,s2 # return value from isr
#endif
restore_state:
#if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
move k0,v0
#endif
>> 现场恢复
# All done, restore CPU state and continue
addi sp,sp,mips_stack_frame_size # retrieve CPU state ptr
# Disable interrupts again while we restore state.
hal_cpu_int_disable
hal_diag_restore
hal_fpu_load sp
lw t0,mipsreg_cachectrl(sp)
lhi t1,sp
llo t2,sp
mtc0 t0,cachectrl
mthi t1
mtlo t2
# load GPRs
.set noat
# lgpr 0,sp
lgpr 1,sp
lgpr 2,sp
lgpr 3,sp
lgpr 4,sp
lgpr 5,sp
lgpr 6,sp
lgpr 7,sp
lgpr 8,sp
lgpr 9,sp
lgpr 10,sp
lgpr 11,sp
lgpr 12,sp
lgpr 13,sp
lgpr 14,sp
lgpr 15,sp
lgpr 16,sp
lgpr 17,sp
lgpr 18,sp
lgpr 19,sp
lgpr 20,sp
lgpr 21,sp
lgpr 22,sp
lgpr 23,sp
lgpr 24,sp
lgpr 25,sp
# lgpr 26,sp # == K0
# lgpr 27,sp # == K1
lgpr 28,sp # == GP
# lgpr 29,sp # == SP
lgpr 30,sp # == FP
lgpr 31,sp # == RA
.set at
>> 没有用过ROM_MONITOR，不清楚这里的意思
#if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
# If we have a Cygmon that wants to listen to network interrupts, then
# the return code from the earlier call to hal_default_isr() will
# have been negative to indicate this. So we jump into Cygmon here
# because Cygmon requires the processor state to be the same as when
# the interrupt was taken, but with k0 as the exception number.
bgez k0,1f
nop
# Check for new cygmon
sw k0,(mipsreg_regs+26*4)(sp) # save k0
la k1,0x80000100 + 41*4 # New cygmon "magic" id
lw k1,0(k1)
lui k0,0x55aa
ori k0,0x4321
bne k0,k1,1f
# Need to let cygmon handle this
la k1,0x80000100 + 39*4 # stub entry vector
lw k0,(mipsreg_regs+26*4)(sp) # restore k0
lw k1,0(k1)
lw sp,(mipsreg_regs+29*4)(sp) # restore SP
sll k0,1 # clear bit 31.
jr k1
srl k0,1
1:
#endif
lw k1,mipsreg_sr(sp) # K1 = saved SR
#if 0 < CYGINT_HAL_MIPS_INTERRUPT_RETURN_KEEP_SR_IM
# Keep the current settings of the IM[7:0] bits within the status
# register. These may be used as interrupt masks, so if an ISR or
# DSR masks interrupts they must be preserved.
# If they are not used, then this does no harm.
ori k0,zero,0xff00
nor k0,k0,k0 # 0xffff00ff
and k1,k1,k0 # all interrupts disabled
mfc0 k0,status # V0 = current SR
nop
nop
andi k0,k0,0xff00 # preserve interrupt set
or k1,k1,k0 # insert into "saved SR"
#endif // 0 < CYGINT_HAL_MIPS_INTERRUPT_RETURN_KEEP_SR_IM
lva k0,mipsreg_pc(sp) # K0 = return PC
lsp sp,sp # load SP
# Invoke CPU specific mechanism for returning from this
# exception
hal_cpu_eret k0,k1
FUNC_END(__default_interrupt_vsr)
>>定义并初始化intc decode的table 变量
hal_intc_decode_data