monitor 用来捕获(监视)和检查总线的信号是否满足预期的要求。所有的user_monitor 继承自uvm_monitor,uvm_monitor继承自uvm_component,从源代码来看里面没有做什么工作,那为什么又费力去做这么一件事,这么做的原因是让不同的模块做不同事,从名字就可以区分开该模块的功能,提供代码的可阅读性。
A monitor should have the following functions :
• Collect bus information through a virtual interface
• Collected data can be used for protocol checking and coverage
• Collected data is exported via an analysis port
//----------------------------------------------------------------------------- // CLASS: uvm_monitor // // This class should be used as the base class for user-defined monitors. // // Deriving from uvm_monitor allows you to distinguish monitors from generic // component types inheriting from uvm_component. Such monitors will // automatically inherit features that may be added to uvm_monitor in the future. // //----------------------------------------------------------------------------- virtual class uvm_monitor extends uvm_component; // Function: new // // Creates and initializes an instance of this class using the normal // constructor arguments for <uvm_component>: ~name~ is the name of the // instance, and ~parent~ is the handle to the hierarchical parent, if any. function new (string name, uvm_component parent); super.new(name, parent); endfunction const static string type_name = "uvm_monitor"; virtual function string get_type_name (); return type_name; endfunction endclass
参考文献:
1 uvm_monitor. http://www.chipverify.com/uvm/monitor