• 和菜鸟一起学OK6410之熟悉内核源码


           今天还是挺顺利的,这周的工作两天就搞定了,其实有点小简单。确实,我们都需要信心。总觉得,网线是个可恶的东西,老是懒懒的刷着网页也不干点实事,让自己进步也慢了好几拍。所以还是把网线直接接到开发板上去了,哈哈,那样就可以不上网,好好玩小o了。

           前几天终于把以前留下的tftp下载内核和nfs挂载文件系统给搞定了,接下来开始直接拿linux2.6.28那个内核玩了,公司里所有的寄存器啊,platform啊什么的放在哪里都有同事告诉我了,而这个板子的那些个东东在哪里还不是很清楚,那就找找吧,用grep小搜了一把,终于找到了,下面贴一下,以后学习就可以不忘记了。

           对于小oplatformc文件是放在arch/arm/mach-s3c6410/mach-smdk6410.c

    代码600多行,就只拿些主要的注册device的代码了。

     

    static struct platform_device *smdk6410_devices[] __initdata = {
    
    #ifdef CONFIG_SMDK6410_SD_CH0
    
           &s3c_device_hsmmc0,
    
    #endif
    
    #ifdef CONFIG_SMDK6410_SD_CH1
    
           &s3c_device_hsmmc1,
    
    #endif
    
    #ifdef CONFIG_SMDK6410_SD_CH2
    
           &s3c_device_hsmmc2,
    
    #endif
    
           &s3c_device_wdt,
    
           &s3c_device_rtc,
    
           &s3c_device_i2c0,
    
           //&s3c_device_i2c1,
    
           &s3c_device_spi0,
    
           &s3c_device_spi1,
    
           &s3c_device_keypad,
    
           &s3c_device_ts,
    
           //&s3c_device_smc911x,
    
           &s3c_device_dm9000_cs1,
    
           &s3c_device_lcd,
    
           &s3c_device_vpp,
    
           &s3c_device_mfc,
    
           &s3c_device_tvenc,
    
           &s3c_device_tvscaler,
    
           &s3c_device_rotator,
    
           &s3c_device_jpeg,
    
           &s3c_device_nand,
    
           &s3c_device_onenand,
    
           &s3c_device_usb,
    
           &s3c_device_usbgadget,
    
           &s3c_device_usb_otghcd,
    
           &s3c_device_fimc0,
    
           &s3c_device_fimc1,
    
           &s3c_device_g2d,
    
           &s3c_device_g3d,
    
     
    
    #ifdef CONFIG_S3C64XX_ADC
    
           &s3c_device_adc,
    
    #endif
    
     
    
    #ifdef CONFIG_HAVE_PWM
    
           &s3c_device_timer[0],
    
           &s3c_device_timer[1],
    
    #endif
    
     
    
           &gpio_button_device,
    
           //&s3c_device_can,
    
    };
    
     
    
    static struct i2c_board_info i2c_devs0[] __initdata = {
    
           { I2C_BOARD_INFO("24c08", 0x50), },
    
    /*    { I2C_BOARD_INFO("WM8580", 0x1b), },       */
    
    };
    
     
    
    static struct i2c_board_info i2c_devs1[] __initdata = {
    
           { I2C_BOARD_INFO("24c128", 0x57), },   /* Samsung S524AD0XD1 */
    
           { I2C_BOARD_INFO("WM8580", 0x1b), },
    
    };
    
     
    
     
    
    static void __init smdk6410_machine_init(void)
    
    {
    
           s3c_device_nand.dev.platform_data = &s3c_nand_mtd_part_info;
    
           s3c_device_onenand.dev.platform_data = &s3c_onenand_data;
    
     
    
           smdk6410_smc911x_set();
    
     
    
           s3c_i2c0_set_platdata(NULL);
    
           //s3c_i2c1_set_platdata(NULL);
    
     
    
           s3c_ts_set_platdata(&s3c_ts_platform);
    
           s3c_adc_set_platdata(&s3c_adc_platform);
    
     
    
           i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
    
           i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
    
     
    
    //     spi_register_board_info(sam_spi_devs, ARRAY_SIZE(sam_spi_devs));
    
           spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
    
     
    
     
    
           s3c_fimc0_set_platdata(NULL);
    
           s3c_fimc1_set_platdata(NULL);
    
     
    
    #ifdef CONFIG_VIDEO_FIMC
    
           //s3c_fimc_reset_camera();
    
    #endif
    
     
    
           platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
    
           s3c6410_pm_init();
    
     
    
           smdk_backlight_register();
    
           
    
    }
    
    


            上面的注册了很多的platform的设备,而对于i2c等也注册了对应的设备。至于platform的实现,这里就不多讲了,只是为了以后学习熟悉下,在哪个地方。

            知道了platform了,那么相关的一些寄存器是在哪里定义的呢?还是grep一把吧。

            找了好久,终于找到了,在\arch\arm\plat-s3c64xx\include\plat目录下面

            好多吧,从gpioa—gpioq口,还有media的啊,pm的,clock的,iis的等等,具体可以看看代码,还是先看下reg-gpio.h这个文件吧

     

    /

    * linux/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h
    
     *
    
     * Copyright 2008 Openmoko, Inc.
    
     * Copyright 2008 Simtec Electronics
    
     *      Ben Dooks <ben@simtec.co.uk>
    
     *      http://armlinux.simtec.co.uk/
    
     *
    
     * S3C64XX - GPIO register definitions
    
     */
    
     
    
    #ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_H
    
    #define __ASM_PLAT_S3C64XX_REGS_GPIO_H __FILE__
    
     
    
    #include <plat/gpio-bank-a.h>
    
    #include <plat/gpio-bank-b.h>
    
    #include <plat/gpio-bank-c.h>
    
    #include <plat/gpio-bank-d.h>
    
    #include <plat/gpio-bank-e.h>
    
    #include <plat/gpio-bank-f.h>
    
    #include <plat/gpio-bank-g.h>
    
    #include <plat/gpio-bank-h.h>
    
    #include <plat/gpio-bank-i.h>
    
    #include <plat/gpio-bank-j.h>
    
    #include <plat/gpio-bank-k.h>
    
    #include <plat/gpio-bank-l.h>
    
    #include <plat/gpio-bank-n.h>
    
    #include <plat/gpio-bank-m.h>
    
    #include <plat/gpio-bank-o.h>
    
    #include <plat/gpio-bank-p.h>
    
    #include <plat/gpio-bank-q.h>
    
    #include <mach/map.h>
    
     
    
    /* Base addresses for each of the banks */
    
     
    
    #define S3C64XX_GPA_BASE     (S3C64XX_VA_GPIO + 0x0000)
    
    #define S3C64XX_GPB_BASE     (S3C64XX_VA_GPIO + 0x0020)
    
    #define S3C64XX_GPC_BASE     (S3C64XX_VA_GPIO + 0x0040)
    
    #define S3C64XX_GPD_BASE     (S3C64XX_VA_GPIO + 0x0060)
    
    #define S3C64XX_GPE_BASE     (S3C64XX_VA_GPIO + 0x0080)
    
    #define S3C64XX_GPF_BASE     (S3C64XX_VA_GPIO + 0x00A0)
    
    #define S3C64XX_GPG_BASE     (S3C64XX_VA_GPIO + 0x00C0)
    
    #define S3C64XX_GPH_BASE     (S3C64XX_VA_GPIO + 0x00E0)
    
    #define S3C64XX_GPI_BASE      (S3C64XX_VA_GPIO + 0x0100)
    
    #define S3C64XX_GPJ_BASE      (S3C64XX_VA_GPIO + 0x0120)
    
    #define S3C64XX_GPK_BASE     (S3C64XX_VA_GPIO + 0x0800)
    
    #define S3C64XX_GPL_BASE     (S3C64XX_VA_GPIO + 0x0810)
    
    #define S3C64XX_GPM_BASE    (S3C64XX_VA_GPIO + 0x0820)
    
    #define S3C64XX_GPN_BASE     (S3C64XX_VA_GPIO + 0x0830)
    
    #define S3C64XX_GPO_BASE     (S3C64XX_VA_GPIO + 0x0140)
    
    #define S3C64XX_GPP_BASE     (S3C64XX_VA_GPIO + 0x0160)
    
    #define S3C64XX_GPQ_BASE     (S3C64XX_VA_GPIO + 0x0180)
    
    #define S3C64XX_SPC_BASE     (S3C64XX_VA_GPIO + 0x01A0)
    
    #define S3C64XX_MEM0CONSTOP   (S3C64XX_VA_GPIO + 0x01B0)
    
    #define S3C64XX_MEM1CONSTOP   (S3C64XX_VA_GPIO + 0x01B4)
    
    #define S3C64XX_MEM0CONSLP0    (S3C64XX_VA_GPIO + 0x01C0)
    
    #define S3C64XX_MEM0CONSLP1    (S3C64XX_VA_GPIO + 0x01C4)
    
    #define S3C64XX_MEM1CONSLP      (S3C64XX_VA_GPIO + 0x01C8)
    
    #define S3C64XX_MEM0DRVCON     (S3C64XX_VA_GPIO + 0x01D0)
    
    #define S3C64XX_MEM1DRVCON     (S3C64XX_VA_GPIO + 0x01D4)
    
    #define S3C64XX_EINT0CON0   (S3C64XX_VA_GPIO + 0x0900)
    
    #define S3C64XX_EINT0CON1   (S3C64XX_VA_GPIO + 0x0904)
    
    #define S3C64XX_EINT0FLTCON0    (S3C64XX_VA_GPIO + 0x0910)
    
    #define S3C64XX_EINT0FLTCON1    (S3C64XX_VA_GPIO + 0x0914)
    
    #define S3C64XX_EINT0FLTCON2    (S3C64XX_VA_GPIO + 0x0918)
    
    #define S3C64XX_EINT0FLTCON3    (S3C64XX_VA_GPIO + 0x091C)
    
    #define S3C64XX_EINT0MASK  (S3C64XX_VA_GPIO + 0x0920)
    
    #define S3C64XX_EINT0PEND   (S3C64XX_VA_GPIO + 0x0924)
    
    #define S3C64XX_SPCONSLP    (S3C64XX_VA_GPIO + 0x0880)
    
    #define S3C64XX_SLPEN           (S3C64XX_VA_GPIO + 0x0930)
    
    #define S3C64XX_EINT12CON   (S3C64XX_VA_GPIO + 0x0200)
    
    #define S3C64XX_EINT34CON   (S3C64XX_VA_GPIO + 0x0204)
    
    #define S3C64XX_EINT56CON   (S3C64XX_VA_GPIO + 0x0208)
    
    #define S3C64XX_EINT78CON   (S3C64XX_VA_GPIO + 0x020C)
    
    #define S3C64XX_EINT9CON     (S3C64XX_VA_GPIO + 0x0210)
    
    #define S3C64XX_EINT12FLTCON    (S3C64XX_VA_GPIO + 0x0220)
    
    #define S3C64XX_EINT34FLTCON    (S3C64XX_VA_GPIO + 0x0224)
    
    #define S3C64XX_EINT56FLTCON    (S3C64XX_VA_GPIO + 0x0228)
    
    #define S3C64XX_EINT78FLTCON    (S3C64XX_VA_GPIO + 0x022C)
    
    #define S3C64XX_EINT9FLTCON      (S3C64XX_VA_GPIO + 0x0230)
    
    #define S3C64XX_EINT12MASK (S3C64XX_VA_GPIO + 0x0240)
    
    #define S3C64XX_EINT34MASK (S3C64XX_VA_GPIO + 0x0244)
    
    #define S3C64XX_EINT56MASK (S3C64XX_VA_GPIO + 0x0248)
    
    #define S3C64XX_EINT78MASK (S3C64XX_VA_GPIO + 0x024C)
    
    #define S3C64XX_EINT9MASK  (S3C64XX_VA_GPIO + 0x0250)
    
    #define S3C64XX_EINT12PEND (S3C64XX_VA_GPIO + 0x0260)
    
    #define S3C64XX_EINT34PEND (S3C64XX_VA_GPIO + 0x0264)
    
    #define S3C64XX_EINT56PEND (S3C64XX_VA_GPIO + 0x0268)
    
    #define S3C64XX_EINT78PEND (S3C64XX_VA_GPIO + 0x026C)
    
    #define S3C64XX_EINT9PEND   (S3C64XX_VA_GPIO + 0x0270)
    
    #define S3C64XX_PRIORITY      (S3C64XX_VA_GPIO + 0x0280)
    
    #define S3C64XX_SERVICE        (S3C64XX_VA_GPIO + 0x0284)
    
    #define S3C64XX_SERVICEPEND      (S3C64XX_VA_GPIO + 0x0288)
    
     
    
    /* values for S3C_EXTINT0 */
    
    #define S3C64XX_EXTINT_LOWLEV       (0x00)
    
    #define S3C64XX_EXTINT_HILEV    (0x01)
    
    #define S3C64XX_EXTINT_FALLEDGE    (0x02)
    
    #define S3C64XX_EXTINT_RISEEDGE     (0x04)
    
    #define S3C64XX_EXTINT_BOTHEDGE   (0x06)
    
     
    
    #endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_H */
    
     
    
    


            发现有个头文件#include <mach/map.h>

            应该S3C64XX_VA_GPIO这个地址在那里定义的

     

    /* linux/arch/arm/mach-s3c6400/include/mach/map.h
    
    */
    
     
    
    #ifndef __ASM_ARCH_MAP_H
    
    #define __ASM_ARCH_MAP_H __FILE__
    
     
    
    #include <plat/map-base.h>
    
     
    
    /* HSMMC units */
    
    #define S3C64XX_PA_HSMMC(x)      (0x7C200000 + ((x) * 0x100000))
    
    #define S3C64XX_PA_HSMMC0  S3C64XX_PA_HSMMC(0)
    
    #define S3C64XX_PA_HSMMC1  S3C64XX_PA_HSMMC(1)
    
    #define S3C64XX_PA_HSMMC2  S3C64XX_PA_HSMMC(2)
    
    #define S3C_SZ_HSMMC          SZ_1M
    
     
    
    #define S3C_PA_UART         (0x7F005000)
    
    #define S3C_PA_UART0              (S3C_PA_UART + 0x00)
    
    #define S3C_PA_UART1              (S3C_PA_UART + 0x400)
    
    #define S3C_PA_UART2              (S3C_PA_UART + 0x800)
    
    #define S3C_PA_UART3              (S3C_PA_UART + 0xC00)
    
    #define S3C_UART_OFFSET              (0x400)
    
     
    
    /* See notes on UART VA mapping in debug-macro.S */
    
    #define S3C_VA_UARTx(x)          (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
    
     
    
    #define S3C_VA_UART0              S3C_VA_UARTx(0)
    
    #define S3C_VA_UART1              S3C_VA_UARTx(1)
    
    #define S3C_VA_UART2              S3C_VA_UARTx(2)
    
    #define S3C_VA_UART3              S3C_VA_UARTx(3)
    
    #define S3C_SZ_UART         SZ_256
    
     
    
    #define S3C64XX_PA_SYSCON  (0x7E00F000)
    
    #define S3C64XX_PA_TIMER     (0x7F006000)
    
    #define S3C64XX_PA_IIC0         (0x7F004000)
    
    #define S3C64XX_PA_IIC1         (0x7F00F000)
    
     
    
    #define S3C64XX_PA_GPIO        (0x7F008000)
    
    #define S3C64XX_VA_GPIO        S3C_ADDR(0x00500000)
    
    #define S3C64XX_SZ_GPIO        SZ_4K
    
     
    
    #define S3C64XX_PA_SDRAM    (0x50000000)
    
    #define S3C64XX_PA_VIC0        (0x71200000)
    
    #define S3C64XX_PA_VIC1        (0x71300000)
    
     
    
    #define S3C64XX_VA_SROMC    S3C_VA_SROMC
    
    #define S3C64XX_PA_SROMC    (0x70000000)
    
    #define S3C64XX_SZ_SROMC    SZ_1M
    
     
    
    #define S3C64XX_VA_LCD       S3C_VA_LCD
    
    #define S3C64XX_PA_LCD       (0x77100000)
    
    #define S3C64XX_SZ_LCD         SZ_1M
    
     
    
    #define S3C64XX_PA_G2D       (0x76100000)
    
    #define S3C64XX_SZ_G2D         SZ_1M
    
     
    
    #define S3C64XX_PA_G3D       (0x72000000)
    
    #define S3C64XX_SZ_G3D         SZ_16M
    
     
    
    #define S3C64XX_PA_FIMC              (0x78000000)
    
    #define S3C64XX_SZ_FIMC              SZ_1M
    
     
    
    #define S3C64XX_PA_ADC         (0x7E00B000)
    
    //#define S3C64XX_PA_SMC9115       (0x18000000)
    
    //#define S3C64XX_SZ_SMC9115       SZ_512M
    
    #define S3C64XX_PA_DM9000   (0x18000000)
    
    #define S3C64XX_SZ_DM9000   SZ_1M
    
    #define S3C64XX_VA_DM9000   S3C_ADDR(0x03b00300)
    
     
    
    /* AC97 add by lyt */
    
    #define S3C6400_PA_AC97 (0x7F001000)
    
     
    
    #define S3C64XX_PA_IIS         (0x7F002000)
    
    #define S3C64XX_PA_RTC       (0x7E005000)
    
    #define S3C64XX_PA_IIS_V40   (0x7F00D000)
    
    #define S3C_SZ_IIS             SZ_8K
    
     
    
    /* DMA controller */
    
    #define S3C64XX_PA_DMA        (0x75000000)
    
     
    
    /* place VICs close together */
    
    #define S3C_VA_VIC0          (S3C_VA_IRQ + 0x00)
    
    #define S3C_VA_VIC1          (S3C_VA_IRQ + 0x10000)
    
     
    
    /* Host I/F Indirect & Direct */
    
    #define S3C64XX_VA_HOSTIFA  S3C_ADDR(0x00B00000)
    
    #define S3C64XX_PA_HOSTIFA  (0x74000000)
    
    #define S3C64XX_SZ_HOSTIFA  SZ_1M
    
     
    
    #define S3C64XX_VA_HOSTIFB  S3C_ADDR(0x00C00000)
    
    #define S3C64XX_PA_HOSTIFB  (0x74100000)
    
    #define S3C64XX_SZ_HOSTIFB  SZ_1M
    
     
    
    /* TV-ENCODER */
    
    #define S3C6400_PA_TVENC      (0x76200000)
    
    #define S5PC100_PA_TVENC      (0xF0000000)
    
    #define S3C_SZ_TVENC             SZ_1M
    
     
    
    /* TV-SCALER*/
    
    #define S3C6400_PA_TVSCALER       (0x76300000)
    
    #define S3C_SZ_TVSCALER              SZ_1M
    
     
    
    /* Rotator */
    
    #define S3C6400_PA_ROTATOR      (0x77200000)
    
    #define S3C_SZ_ROTATOR          SZ_1M
    
     
    
    /* JPEG */
    
    #define S3C6400_PA_JPEG         (0x78800000)
    
    #define S3C_SZ_JPEG             SZ_4M
    
     
    
    /* VPP */
    
    #define S3C6400_PA_VPP          (0x77000000)
    
    #define S5PC100_PA_VPP          (0xF0100000)
    
    #define S3C_SZ_VPP              SZ_1M
    
     
    
    /* MFC */
    
    #define S3C6400_PA_MFC          (0x7E002000)
    
    #define S5PC100_PA_MFC          (0xF1000000)
    
    #define S3C_SZ_MFC          SZ_4K
    
        
    
    /* NAND flash controller */
    
    #define S3C64XX_PA_NAND           (0x70200000)
    
    #define S3C64XX_SZ_NAND           SZ_1M
    
     
    
    /* OneNAND */
    
    #define S3C64XX_PA_ONENAND      (0x70100000)
    
    #define    S3C_SZ_ONENAND            SZ_1M
    
     
    
    /* USB Host */
    
    #define S3C64XX_PA_USBHOST (0x74300000)
    
    #define S3C64XX_SZ_USBHOST SZ_1M
    
     
    
    /* USB OTG */
    
    #define S3C64XX_VA_OTG         S3C_ADDR(0x03900000)
    
    #define S3C64XX_PA_OTG         (0x7C000000)
    
    #define S3C64XX_SZ_OTG         SZ_1M
    
     
    
    /* USB OTG SFR */
    
    #define S3C64XX_VA_OTGSFR  S3C_ADDR(0x03a00000)
    
    #define S3C64XX_PA_OTGSFR  (0x7C100000)
    
    #define S3C64XX_SZ_OTGSFR  SZ_1M
    
     
    
    #define S3C64XX_PA_KEYPAD   (0x7E00A000)
    
    #define S3C64XX_SZ_KEYPAD   SZ_4K
    
     
    
    /* SPI */
    
    #define S3C64XX_PA_SPI         (0x7F00B000)
    
    #define S3C64XX_PA_SPI0       (0x7F00B000)
    
    #define S3C64XX_PA_SPI1       (0x7F00C000)
    
    #define S3C64XX_SZ_SPI           SZ_8K
    
    #define S3C64XX_SZ_SPI0         SZ_4K
    
    #define S3C64XX_SZ_SPI1         SZ_4K
    
     
    
    /* Watchdog */
    
    #define S3C64XX_PA_WATCHDOG   (0x7E004000)
    
    #define S3C64XX_SZ_WATCHDOG   SZ_4K
    
     
    
    /* compatibiltiy defines. */
    
    #define S3C_PA_TIMER              S3C64XX_PA_TIMER
    
    #define S3C_PA_HSMMC0          S3C64XX_PA_HSMMC0
    
    #define S3C_PA_HSMMC1          S3C64XX_PA_HSMMC1
    
    #define S3C_PA_HSMMC2          S3C64XX_PA_HSMMC2
    
    #define S3C_PA_IIC             S3C64XX_PA_IIC0
    
    #define S3C_PA_IIC1           S3C64XX_PA_IIC1
    
     
    
    #define S3C_PA_RTC           S3C64XX_PA_RTC
    
     
    
    #define S3C_PA_SPI            S3C64XX_PA_SPI
    
    #define S3C_PA_SPI0          S3C64XX_PA_SPI0
    
    #define S3C_PA_SPI1          S3C64XX_PA_SPI1
    
    #define S3C_SZ_SPI            S3C64XX_SZ_SPI
    
    #define S3C_SZ_SPI0          S3C64XX_SZ_SPI0
    
    #define S3C_SZ_SPI1          S3C64XX_SZ_SPI1
    
     
    
    #define S3C_PA_IIS             S3C64XX_PA_IIS
    
    #define S3C_PA_ADC          S3C64XX_PA_ADC
    
    #define S3C_PA_DMA          S3C64XX_PA_DMA
    
     
    
    #define S3C_VA_OTG          S3C64XX_VA_OTG
    
    #define S3C_PA_OTG          S3C64XX_PA_OTG
    
    #define S3C_SZ_OTG          S3C64XX_SZ_OTG
    
     
    
    #define S3C_VA_OTGSFR           S3C64XX_VA_OTGSFR
    
    #define S3C_PA_OTGSFR           S3C64XX_PA_OTGSFR
    
    #define S3C_SZ_OTGSFR           S3C64XX_SZ_OTGSFR
    
     
    
    #define S3C_PA_KEYPAD           S3C64XX_PA_KEYPAD
    
    #define S3C_SZ_KEYPAD           S3C64XX_SZ_KEYPAD
    
     
    
    #endif /* __ASM_ARCH_6400_MAP_H */
    
    


     

            好了这里什么都定义了,其中的PAphysical address)就是物理地址,而VAvirtual address)就是虚拟地址了。再看S3C_ADDR这个宏。

     

    /* linux/arch/arm/plat-s3c/include/plat/map-base.h
    
    */
    
     
    
    #ifndef __ASM_PLAT_MAP_H
    
    #define __ASM_PLAT_MAP_H __FILE__
    
     
    
    #define S3C_ADDR_BASE    (0xF4000000)
    
     
    
    #ifndef __ASSEMBLY__
    
    #define S3C_ADDR(x)  ((void __iomem __force *)S3C_ADDR_BASE + (x))
    
    #else
    
    #define S3C_ADDR(x)  (S3C_ADDR_BASE + (x))
    
    #endif
    
     
    
    #define S3C_VA_IRQ    S3C_ADDR(0x00000000)     /* irq controller(s) */
    
    #define S3C_VA_SYS    S3C_ADDR(0x00100000)     /* system control */
    
    #define S3C_VA_MEM  S3C_ADDR(0x00200000)     /* system control */
    
    #define S3C_VA_TIMER       S3C_ADDR(0x00300000)     /* timer block */
    
    #define S3C_VA_WATCHDOG      S3C_ADDR(0x00400000)     /* watchdog */
    
    #define S3C_VA_LCD    S3C_ADDR(0x00600000)     /* LCD */
    
    #define S3C_VA_UART  S3C_ADDR(0x01000000)     /* UART */
    
    #define S3C_VA_SROMC     S3C_ADDR(0x01100000)     /* SROM SFR */
    
    #define S3C_VA_SYSTIMER       S3C_ADDR(0x01200000)     /* SROM SFR */
    
    #define S3C_VA_NAND     S3C_ADDR(0x01400000)    /* NAND */
    
     
    
    #endif /* __ASM_PLAT_MAP_H */
    
    


     

            OK, 这个基地址就是#define S3C_ADDR_BASE       (0xF4000000)

            Ok,现在也知道了寄存器了的地址了,那么剩下的就是驱动中要配置什么寄存器就用相应的宏就好了,对于以后的开发也方面多了,只要结合芯片的文档加上这些,那么OK6410岂不是在你的手中,牢牢地,想逃也逃不掉了。

             收工,睡觉,下一步,开始对小o现有的驱动,慢慢理解,慢慢分析,慢慢调试。Come on

     

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  • 原文地址:https://www.cnblogs.com/wuyida/p/6300062.html
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